Multigrain automatic parallelization in Japanese Millennium Project IT21 Advanced Parallelizing Compiler

H. Kasahara, M. Obata, K. Ishizaka, K. Kimura, H. Kaminaga, H. Nakano, K. Nagasawa, A. Murai, H. Itagaki, J. Shirako

Research output: Chapter in Book/Report/Conference proceedingConference contribution

8 Citations (Scopus)

Abstract

This paper describes OSCAR multigrain parallelizing compiler which has been developed in Japanese Millennium Project IT21 "Advanced Parallelizing Compiler" project and its performance on SMP machines. The compiler realizes multigrain parallelization for chip-multiprocessors to high-end servers. It hierarchically exploits coarse grain task parallelism among loops, subroutines and basic blocks and near fine grain parallelism among statements inside a basic block in addition to loop parallelism. Also, it globally optimizes cache use over different loops, or coarse grain tasks, based on data localization technique to reduce memory access overhead. Current performance of OSCAR compiler for SPEC95fp is evaluated on different SMPs. For example, it gives us 3.7 times speedup for HYDRO2D, 1.8 times for SWIM, 1.7 times for SU2COR, 2.0 times for MGRID, 3.3 times for TURB3D on 8 processor IBM RS6000, against XL Fortran compiler ver.7.1 and 4.2 times speedup for SWIM and 2.2 times speedup for TURB3D on 4 processor Sun Ultra80 workstation against Forte6 update 2.

Original languageEnglish
Title of host publicationProceedings - International Conference on Parallel Computing in Electrical Engineering, PARELEC 2002
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages105-111
Number of pages7
ISBN (Electronic)0769517307, 9780769517308
DOIs
Publication statusPublished - 2002 Jan 1
EventInternational Conference on Parallel Computing in Electrical Engineering, PARELEC 2002 - Warsaw, Poland
Duration: 2002 Sep 222002 Sep 25

Publication series

NameProceedings - International Conference on Parallel Computing in Electrical Engineering, PARELEC 2002

Other

OtherInternational Conference on Parallel Computing in Electrical Engineering, PARELEC 2002
CountryPoland
CityWarsaw
Period02/9/2202/9/25

Keywords

  • Algorithms
  • Data analysis
  • Government
  • Memory architecture
  • Multiprocessing systems
  • Parallel processing
  • Program processors
  • Testing
  • Usability
  • Workstations

ASJC Scopus subject areas

  • Computer Science Applications
  • Electrical and Electronic Engineering

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  • Cite this

    Kasahara, H., Obata, M., Ishizaka, K., Kimura, K., Kaminaga, H., Nakano, H., Nagasawa, K., Murai, A., Itagaki, H., & Shirako, J. (2002). Multigrain automatic parallelization in Japanese Millennium Project IT21 Advanced Parallelizing Compiler. In Proceedings - International Conference on Parallel Computing in Electrical Engineering, PARELEC 2002 (pp. 105-111). [1115213] (Proceedings - International Conference on Parallel Computing in Electrical Engineering, PARELEC 2002). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/PCEE.2002.1115213