Near fine grain parallel processing of circuit simulation using direct method

Y. Maekawa, K. Nakano, M. Takai, Hironori Kasahara

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    Abstract

    This paper proposes a parallel processing scheme of electronic circuit simulation using direct method and evaluates performance of the scheme on a multiprocessor system named OSCAR (Optimally SCheduled Advanced MultiprocessoR) with centralized shared memory, distributed shared memory and local memory. A special purpose compiler is used to realize efficient near fine grain parallel processing of circuit simulation on an actual multiprocessor system. The compiler automatically generates a circuit simulation program from SPICE format input data. The compiler decomposes the program into tasks, analyzes data dependencies among tasks, schedules the tasks and generates optimized parallel machine code. In the parallel machine code generation process, a different machine code for each processor, which consists of task codes, data transfer codes and synchronization codes, is generated by using static scheduling result.

    Original languageEnglish
    Title of host publicationIEEE Pacific RIM Conference on Communications, Computers, and Signal Processing - Proceedings
    Place of PublicationPiscataway, NJ, United States
    PublisherIEEE
    Pages272-276
    Number of pages5
    Publication statusPublished - 1995
    EventProceedings of the 1995 IEEE Pacific RIM Conference on Communications, Computers, and Signal Processing - Victoria, BC, Can
    Duration: 1995 May 171995 May 19

    Other

    OtherProceedings of the 1995 IEEE Pacific RIM Conference on Communications, Computers, and Signal Processing
    CityVictoria, BC, Can
    Period95/5/1795/5/19

    Fingerprint

    Circuit simulation
    Data storage equipment
    Processing
    SPICE
    Data transfer
    Synchronization
    Scheduling
    Networks (circuits)

    ASJC Scopus subject areas

    • Signal Processing

    Cite this

    Maekawa, Y., Nakano, K., Takai, M., & Kasahara, H. (1995). Near fine grain parallel processing of circuit simulation using direct method. In IEEE Pacific RIM Conference on Communications, Computers, and Signal Processing - Proceedings (pp. 272-276). Piscataway, NJ, United States: IEEE.

    Near fine grain parallel processing of circuit simulation using direct method. / Maekawa, Y.; Nakano, K.; Takai, M.; Kasahara, Hironori.

    IEEE Pacific RIM Conference on Communications, Computers, and Signal Processing - Proceedings. Piscataway, NJ, United States : IEEE, 1995. p. 272-276.

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    Maekawa, Y, Nakano, K, Takai, M & Kasahara, H 1995, Near fine grain parallel processing of circuit simulation using direct method. in IEEE Pacific RIM Conference on Communications, Computers, and Signal Processing - Proceedings. IEEE, Piscataway, NJ, United States, pp. 272-276, Proceedings of the 1995 IEEE Pacific RIM Conference on Communications, Computers, and Signal Processing, Victoria, BC, Can, 95/5/17.
    Maekawa Y, Nakano K, Takai M, Kasahara H. Near fine grain parallel processing of circuit simulation using direct method. In IEEE Pacific RIM Conference on Communications, Computers, and Signal Processing - Proceedings. Piscataway, NJ, United States: IEEE. 1995. p. 272-276
    Maekawa, Y. ; Nakano, K. ; Takai, M. ; Kasahara, Hironori. / Near fine grain parallel processing of circuit simulation using direct method. IEEE Pacific RIM Conference on Communications, Computers, and Signal Processing - Proceedings. Piscataway, NJ, United States : IEEE, 1995. pp. 272-276
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