New incremental simulation algorithm for large scale circuits and its evaluation

Hiroshi Arai, Yoshiaki Fukazawa

Research output: Contribution to conferencePaper

2 Citations (Scopus)

Abstract

The incremental simulation algorithm speeds up the simulation of digital hardware by storing and reusing simulation events. For large circuits, in order to reduce the amount of events to be stored, it is necessary to select nets and store only the events relevant to those nets. Our new incremental simulation algorithm selects nets according to expected amounts of evaluation eliminated by storing each net's simulation events. Compared to traditional net selection algorithm, speedups of 1.78 to 1.94 were achievable with our algorithm.

Original languageEnglish
Pages343-346
Number of pages4
Publication statusPublished - 1995 Dec 1
Externally publishedYes
EventProceedings of the 1995 IEEE Region 10 International Conference on Microelectronics and VLSI, TENCON'95 - Hong Kong, Hong Kong
Duration: 1995 Nov 61995 Nov 10

Other

OtherProceedings of the 1995 IEEE Region 10 International Conference on Microelectronics and VLSI, TENCON'95
CityHong Kong, Hong Kong
Period95/11/695/11/10

ASJC Scopus subject areas

  • Computer Science Applications
  • Electrical and Electronic Engineering

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    Arai, H., & Fukazawa, Y. (1995). New incremental simulation algorithm for large scale circuits and its evaluation. 343-346. Paper presented at Proceedings of the 1995 IEEE Region 10 International Conference on Microelectronics and VLSI, TENCON'95, Hong Kong, Hong Kong, .