ON THE DESIGN OF A HIGH-PERFORMANCE LSI CIRCUIT DIGITAL SIGNAL PROCESSOR FOR COMMUNICATION.

Hirohisa Gambe, Toshi Ikezawa, Toshihiko Matsumura, Toshitaka Tsuda, Shigeru Fujii

    Research output: Contribution to journalArticle

    1 Citation (Scopus)

    Abstract

    This paper describes the design of a highly efficient CMOS LSI circuit digital signal processor (FDSP3). To realize an operating cycle rate of 10 MHz and a throughput rate of 0. 6 mu s per second-order filter section, considerable care has been paid to the design of software structures and hardware circuitry. Basic program routines and some application examples are shown. These examples illustrate the high efficiency of the developed DSP device.

    Original languageEnglish
    Pages (from-to)357-368
    Number of pages12
    JournalIEEE Journal on Selected Areas in Communications
    VolumeSAC-3
    Issue number2
    Publication statusPublished - 1985 Mar

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    LSI circuits
    Digital signal processors
    Communication
    Throughput
    Hardware

    ASJC Scopus subject areas

    • Computer Networks and Communications
    • Electrical and Electronic Engineering

    Cite this

    ON THE DESIGN OF A HIGH-PERFORMANCE LSI CIRCUIT DIGITAL SIGNAL PROCESSOR FOR COMMUNICATION. / Gambe, Hirohisa; Ikezawa, Toshi; Matsumura, Toshihiko; Tsuda, Toshitaka; Fujii, Shigeru.

    In: IEEE Journal on Selected Areas in Communications, Vol. SAC-3, No. 2, 03.1985, p. 357-368.

    Research output: Contribution to journalArticle

    Gambe, H, Ikezawa, T, Matsumura, T, Tsuda, T & Fujii, S 1985, 'ON THE DESIGN OF A HIGH-PERFORMANCE LSI CIRCUIT DIGITAL SIGNAL PROCESSOR FOR COMMUNICATION.', IEEE Journal on Selected Areas in Communications, vol. SAC-3, no. 2, pp. 357-368.
    Gambe, Hirohisa ; Ikezawa, Toshi ; Matsumura, Toshihiko ; Tsuda, Toshitaka ; Fujii, Shigeru. / ON THE DESIGN OF A HIGH-PERFORMANCE LSI CIRCUIT DIGITAL SIGNAL PROCESSOR FOR COMMUNICATION. In: IEEE Journal on Selected Areas in Communications. 1985 ; Vol. SAC-3, No. 2. pp. 357-368.
    @article{925be67723964865acf6787364f801be,
    title = "ON THE DESIGN OF A HIGH-PERFORMANCE LSI CIRCUIT DIGITAL SIGNAL PROCESSOR FOR COMMUNICATION.",
    abstract = "This paper describes the design of a highly efficient CMOS LSI circuit digital signal processor (FDSP3). To realize an operating cycle rate of 10 MHz and a throughput rate of 0. 6 mu s per second-order filter section, considerable care has been paid to the design of software structures and hardware circuitry. Basic program routines and some application examples are shown. These examples illustrate the high efficiency of the developed DSP device.",
    author = "Hirohisa Gambe and Toshi Ikezawa and Toshihiko Matsumura and Toshitaka Tsuda and Shigeru Fujii",
    year = "1985",
    month = "3",
    language = "English",
    volume = "SAC-3",
    pages = "357--368",
    journal = "IEEE Journal on Selected Areas in Communications",
    issn = "0733-8716",
    publisher = "Institute of Electrical and Electronics Engineers Inc.",
    number = "2",

    }

    TY - JOUR

    T1 - ON THE DESIGN OF A HIGH-PERFORMANCE LSI CIRCUIT DIGITAL SIGNAL PROCESSOR FOR COMMUNICATION.

    AU - Gambe, Hirohisa

    AU - Ikezawa, Toshi

    AU - Matsumura, Toshihiko

    AU - Tsuda, Toshitaka

    AU - Fujii, Shigeru

    PY - 1985/3

    Y1 - 1985/3

    N2 - This paper describes the design of a highly efficient CMOS LSI circuit digital signal processor (FDSP3). To realize an operating cycle rate of 10 MHz and a throughput rate of 0. 6 mu s per second-order filter section, considerable care has been paid to the design of software structures and hardware circuitry. Basic program routines and some application examples are shown. These examples illustrate the high efficiency of the developed DSP device.

    AB - This paper describes the design of a highly efficient CMOS LSI circuit digital signal processor (FDSP3). To realize an operating cycle rate of 10 MHz and a throughput rate of 0. 6 mu s per second-order filter section, considerable care has been paid to the design of software structures and hardware circuitry. Basic program routines and some application examples are shown. These examples illustrate the high efficiency of the developed DSP device.

    UR - http://www.scopus.com/inward/record.url?scp=0022024756&partnerID=8YFLogxK

    UR - http://www.scopus.com/inward/citedby.url?scp=0022024756&partnerID=8YFLogxK

    M3 - Article

    VL - SAC-3

    SP - 357

    EP - 368

    JO - IEEE Journal on Selected Areas in Communications

    JF - IEEE Journal on Selected Areas in Communications

    SN - 0733-8716

    IS - 2

    ER -