Optimally designing capacity and location of caches to reduce P2P traffic

Noriaki Kamiyama*, Ryoichi Kawahara, Tatsuya Mori, Shigeaki Harada, Haruhisa Hasegawa

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contribution

4 Citations (Scopus)

Abstract

Traffic caused by P2P services dominates a large part of traffic on the Internet and imposes significant loads on the Internet, so reducing P2P traffic within networks is an important issue for ISPs. In particular, a huge amount of traffic is transferred within backbone networks; therefore reducing P2P traffic is important for transit ISPs to improve the efficiency of network resource usage and reduce network capital cost. To reduce P2P traffic, it is effective for ISPs to implement cache devices at some router ports and reduce the hop length of P2P flows by delivering the required content from caches. However, the design problem of cache locations and capacities has not been well investigated, although the effect of caches strongly depends on the cache locations and capacities. We propose an optimum design method of cache capacity and location for minimizing the total amount of P2P traffic based on dynamic programming, assuming that transit ISPs provide caches at transit links to access ISP networks. We apply the proposed design method to 31 actual ISP backbone networks.

Original languageEnglish
Title of host publication2010 IEEE International Conference on Communications, ICC 2010
DOIs
Publication statusPublished - 2010
Externally publishedYes
Event2010 IEEE International Conference on Communications, ICC 2010 - Cape Town, South Africa
Duration: 2010 May 232010 May 27

Publication series

NameIEEE International Conference on Communications
ISSN (Print)0536-1486

Conference

Conference2010 IEEE International Conference on Communications, ICC 2010
Country/TerritorySouth Africa
CityCape Town
Period10/5/2310/5/27

ASJC Scopus subject areas

  • Computer Networks and Communications
  • Electrical and Electronic Engineering

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