Gaussian filtering is a smoothing filter used in various tasks. The main disadvantage is the dependence of the processing time on its kernel radius. One solution is using a sliding-discreet cosine transform (DCT), a constant-time algorithm for the kernel radius, and it provides the best performance in terms of both speed and accuracy. However, the speed and accuracy differ according to the type of DCT used. We can also accelerate the sliding-DCT based Gaussian filter by hardware accelerators, but the acceleration requires modification of the algorithms. In this paper, we focus on the fused multiply-add (FMA) instruction of hardware accelerators in modern computer architectures. The FMA instruction simultaneously performs multiplication and addition, i.e.,ax+b. We proposed an acceleration method of the sliding-DCT based Gaussian filtering for the FMA instruction. Moreover, we evaluate the performance of it in terms of computational time and approximation accuracy.