Overview and future challenges of floating body RAM (FBRAM) technology for 32 nm technology node and beyond

Takeshi Hamamoto; Takashi Ohsawa

doi:10.1016/j.sse.2009.03.010

Overview and future challenges of floating body RAM (FBRAM) technology for 32 nm technology node and beyond

Takeshi Hamamoto, Takashi Ohsawa

Research output: Contribution to journal › Article

17 Citations (Scopus)

Abstract

Floating body cell (FBC) is a one-transistor memory cell on SOI substrate aimed at high-density embedded memory on SOC. In order to verify this memory cell technology, a 128 Mb floating body RAM (FBRAM) with FBC has been designed and successfully developed. The memory cell design and the experimental results, including single-cell operation, are reviewed. Based on the experimental results, the scalability of FBC down to 32 nm technology node is also discussed.

Original language	English
Pages (from-to)	676-683
Number of pages	8
Journal	Solid-State Electronics
Volume	53
Issue number	7
DOIs	https://doi.org/10.1016/j.sse.2009.03.010
Publication status	Published - 2009 Jul 1
Externally published	Yes

Keywords

DRAM
Hot carriers
MOSFETs
Silicon-on-insulator (SOI) technology

ASJC Scopus subject areas

Electronic, Optical and Magnetic Materials
Condensed Matter Physics
Electrical and Electronic Engineering
Materials Chemistry

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10.1016/j.sse.2009.03.010

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Hamamoto, T., & Ohsawa, T. (2009). Overview and future challenges of floating body RAM (FBRAM) technology for 32 nm technology node and beyond. Solid-State Electronics, 53(7), 676-683. https://doi.org/10.1016/j.sse.2009.03.010

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