Abstract
Floating body cell (FBC) is a one-transistor memory cell on SOI substrate aimed at high-density embedded memory on SOC. In order to verify this memory cell technology, a 128 Mb floating body RAM (FBRAM) with FBC has been designed and successfully developed. The memory cell design and the experimental results, including single-cell operation, are reviewed. Based on the experimental results, the scalability of FBC down to 32 nm technology node is also discussed.
| Original language | English |
|---|---|
| Pages (from-to) | 676-683 |
| Number of pages | 8 |
| Journal | Solid-State Electronics |
| Volume | 53 |
| Issue number | 7 |
| DOIs | |
| Publication status | Published - 2009 Jul |
| Externally published | Yes |
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Keywords
- DRAM
- Hot carriers
- MOSFETs
- Silicon-on-insulator (SOI) technology
ASJC Scopus subject areas
- Electronic, Optical and Magnetic Materials
- Condensed Matter Physics
- Materials Chemistry
- Electrical and Electronic Engineering
Cite this
Overview and future challenges of floating body RAM (FBRAM) technology for 32 nm technology node and beyond. / Hamamoto, Takeshi; Ohsawa, Takashi.
In: Solid-State Electronics, Vol. 53, No. 7, 07.2009, p. 676-683.Research output: Contribution to journal › Article
}
TY - JOUR
T1 - Overview and future challenges of floating body RAM (FBRAM) technology for 32 nm technology node and beyond
AU - Hamamoto, Takeshi
AU - Ohsawa, Takashi
PY - 2009/7
Y1 - 2009/7
N2 - Floating body cell (FBC) is a one-transistor memory cell on SOI substrate aimed at high-density embedded memory on SOC. In order to verify this memory cell technology, a 128 Mb floating body RAM (FBRAM) with FBC has been designed and successfully developed. The memory cell design and the experimental results, including single-cell operation, are reviewed. Based on the experimental results, the scalability of FBC down to 32 nm technology node is also discussed.
AB - Floating body cell (FBC) is a one-transistor memory cell on SOI substrate aimed at high-density embedded memory on SOC. In order to verify this memory cell technology, a 128 Mb floating body RAM (FBRAM) with FBC has been designed and successfully developed. The memory cell design and the experimental results, including single-cell operation, are reviewed. Based on the experimental results, the scalability of FBC down to 32 nm technology node is also discussed.
KW - DRAM
KW - Hot carriers
KW - MOSFETs
KW - Silicon-on-insulator (SOI) technology
UR - http://www.scopus.com/inward/record.url?scp=67349159445&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=67349159445&partnerID=8YFLogxK
U2 - 10.1016/j.sse.2009.03.010
DO - 10.1016/j.sse.2009.03.010
M3 - Article
AN - SCOPUS:67349159445
VL - 53
SP - 676
EP - 683
JO - Solid-State Electronics
JF - Solid-State Electronics
SN - 0038-1101
IS - 7
ER -