Parallel HD encoding on cell

He Xun, Fang Xiangzhong, Wang Ci, Goto Satoshi

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    6 Citations (Scopus)

    Abstract

    The Cell Broadband Engine Architecture (CBEA) is an excellent architecture for high performance distributed computing and multimedia processing. While the Cell/BE processor is capable of high definition H.264 encoding, there are still no such implementations available. In this paper, we present a parallel implementation of a HD H.264 encoder on this heterogeneous nine cores processor. First we implement a real time SD encoder on a single SPU by optimizing Motion Estimation algorithm, DMA transfers etc. Then we propose a pipelined parallel encoding algorithm for multicore processors, and use this algorithm to get a real time HD H.264 encoder (1920x1080@31fps) by using eight SPEs (58fps on 16 SPEs).

    Original languageEnglish
    Title of host publicationProceedings - IEEE International Symposium on Circuits and Systems
    Pages1065-1068
    Number of pages4
    DOIs
    Publication statusPublished - 2009
    Event2009 IEEE International Symposium on Circuits and Systems, ISCAS 2009 - Taipei
    Duration: 2009 May 242009 May 27

    Other

    Other2009 IEEE International Symposium on Circuits and Systems, ISCAS 2009
    CityTaipei
    Period09/5/2409/5/27

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    ASJC Scopus subject areas

    • Electrical and Electronic Engineering

    Cite this

    Xun, H., Xiangzhong, F., Ci, W., & Satoshi, G. (2009). Parallel HD encoding on cell. In Proceedings - IEEE International Symposium on Circuits and Systems (pp. 1065-1068). [5117943] https://doi.org/10.1109/ISCAS.2009.5117943