Parallel programmable nonvolatile memory using ordinary static random access memory cells

Tomoko Mizutani, Kiyoshi Takeuchi, Takuya Saraya, Hirofumi Shinohara, Masaharu Kobayashi, Toshiro Hiramoto

Research output: Contribution to journalArticle

2 Citations (Scopus)

Abstract

A technique of using an ordinary static random access memory (SRAM) array for a programmable nonvolatile (NV) memory is proposed. The parallel NV writing of the entire array is achieved by simply applying high-voltage stress to the power supply terminal, after storing inverted desired data in the static random access memory (SRAM) array. Successful 2 kbit NV writing is demonstrated using a device-matrix-array (DMA) test element group (TEG) fabricated by 0.18μm technology.

Original languageEnglish
Article number04CD17
JournalJapanese Journal of Applied Physics
Volume56
Issue number4
DOIs
Publication statusPublished - 2017 Apr 1

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random access memory
Data storage equipment
cells
power supplies
high voltages
Electric potential
matrices

ASJC Scopus subject areas

  • Engineering(all)
  • Physics and Astronomy(all)

Cite this

Parallel programmable nonvolatile memory using ordinary static random access memory cells. / Mizutani, Tomoko; Takeuchi, Kiyoshi; Saraya, Takuya; Shinohara, Hirofumi; Kobayashi, Masaharu; Hiramoto, Toshiro.

In: Japanese Journal of Applied Physics, Vol. 56, No. 4, 04CD17, 01.04.2017.

Research output: Contribution to journalArticle

Mizutani, Tomoko ; Takeuchi, Kiyoshi ; Saraya, Takuya ; Shinohara, Hirofumi ; Kobayashi, Masaharu ; Hiramoto, Toshiro. / Parallel programmable nonvolatile memory using ordinary static random access memory cells. In: Japanese Journal of Applied Physics. 2017 ; Vol. 56, No. 4.
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