TY - GEN
T1 - Parallelizing fundamental algorithms such as sorting on multi-core processors for EDA acceleration
AU - Edahiro, Masato
PY - 2009
Y1 - 2009
N2 - Fundamental algorithms should be parallelized to accelerate EDA software on multi-core architecture. In this paper, we introduce scalable algorithms that have scalability on multi-cores. As an example, a sorting algorithm, called Map Sort, is presented. This algorithm uses a map from subsets of input data to intervals on data range. Experimental results show that, in comparison with quick sort on a single CPU, processing time of Map Sort is comparable on a CPU and three times faster on four CPUs.
AB - Fundamental algorithms should be parallelized to accelerate EDA software on multi-core architecture. In this paper, we introduce scalable algorithms that have scalability on multi-cores. As an example, a sorting algorithm, called Map Sort, is presented. This algorithm uses a map from subsets of input data to intervals on data range. Experimental results show that, in comparison with quick sort on a single CPU, processing time of Map Sort is comparable on a CPU and three times faster on four CPUs.
UR - http://www.scopus.com/inward/record.url?scp=64549087560&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=64549087560&partnerID=8YFLogxK
U2 - 10.1109/ASPDAC.2009.4796485
DO - 10.1109/ASPDAC.2009.4796485
M3 - Conference contribution
AN - SCOPUS:64549087560
SN - 9781424427482
T3 - Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC
SP - 230
EP - 233
BT - Proceedings of the ASP-DAC 2009
T2 - Asia and South Pacific Design Automation Conference 2009, ASP-DAC 2009
Y2 - 19 January 2009 through 22 January 2009
ER -