Partitioning-based multiplexer network synthesis for field-data extractors

Koki Ito, Yutaka Tamiya, Masao Yanagisawa, Nozomu Togawa

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Citations (Scopus)

Abstract

As seen in packet analysis of TCP/IP offload engine and stream data processing for video/audio data, it is necessary to extract a particular data field from bulk data, where we can use a field-data extractor. Particularly, an (M, N)-field-data extractor reads out any consecutive N bytes from an M-byte register by connecting its input/output using multiplexers. However, the number of required multiplexers increases too much as the input/output byte lengths increase. How to reduce the number of its required multiplexers is a major challenge. In this paper, we propose an efficient multiplexer network synthesis method for an (M, N)-field-data extractor. Our method is based on inserting an (N + B-1)-byte virtual intermediate register into a multiplexer network and partitioning it into an upper network and a lower network. Our method theoretically reduces the number of required multiplexers without increasing the multiplexer network depth. We also propose how to determine the size of the virtual intermediate register that minimizes the number of required multiplexers. Experimental results show that our method reduces the required number of gates to implement a field-data extractor by up to 92% compared with the one using a naive multiplexer network.

Original languageEnglish
Title of host publicationProceedings - 28th IEEE International System on Chip Conference, SOCC 2015
EditorsThomas Buchner, Danella Zhao, Karan Bhatia, Ramalingam Sridhar
PublisherIEEE Computer Society
Pages263-268
Number of pages6
ISBN (Electronic)9781467390934
DOIs
Publication statusPublished - 2016 Feb 12
Event28th IEEE International System on Chip Conference, SOCC 2015 - Beijing, China
Duration: 2015 Sep 82015 Sep 11

Publication series

NameInternational System on Chip Conference
Volume2016-February
ISSN (Print)2164-1676
ISSN (Electronic)2164-1706

Other

Other28th IEEE International System on Chip Conference, SOCC 2015
CountryChina
CityBeijing
Period15/9/815/9/11

ASJC Scopus subject areas

  • Hardware and Architecture
  • Control and Systems Engineering
  • Electrical and Electronic Engineering

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  • Cite this

    Ito, K., Tamiya, Y., Yanagisawa, M., & Togawa, N. (2016). Partitioning-based multiplexer network synthesis for field-data extractors. In T. Buchner, D. Zhao, K. Bhatia, & R. Sridhar (Eds.), Proceedings - 28th IEEE International System on Chip Conference, SOCC 2015 (pp. 263-268). [7406960] (International System on Chip Conference; Vol. 2016-February). IEEE Computer Society. https://doi.org/10.1109/SOCC.2015.7406960