Performance of the proposed fast track processor for rare decays at the ATLAS experiment

Guido Volpi, Mauro Dell'Orso, Francesco Crescioli, Giovanni Punzi, Paola Giannetti, Jacopo Vivarelli, Erik Brubaker, Monica Dunford, Young Kee Kim, Mel Shochet, Giulio Usai, Kohei Yorita, Catalin Ciobanu, Tony Liss

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

The Fast Track processor (FTK)[7], [8] has been proposed for high-quality track finding at very high rates (Level-1 output rates) for the LHC experiments. Fast, efficient and precise pattern recognition has been studied using a silicon 6-layer sub-detector, including a subset of the pixel and SCT layers. We tested the FTK algorithms using the ATLAS full simulation. We compare the FTK reconstruction quality with the tracking capability of the offline IPatRec algorithm. We show that similar resolutions and efficiencies are reached by FTK at a speed higher than iPatRec by orders of magnitude. With FTK full events are reconstructed at the Level-1 output rate. Bs o → μ+μ- events are fully simulated together with background samples. We show that a low Level-2 rate is allowed by FTK, even using a single 6 GeV Level-1 muon selection trigger. FTK provides the full-resolution track list ready for the Level-2 Bs o identification. All selection cuts performed by the Event Filter can be easily anticipated at Level-2. We present the Bs o → μ+ μ- efficiency gain and related Level-2 rates.

Original languageEnglish
Title of host publication2007 15th IEEE-NPSS Real-Time Conference, RT
DOIs
Publication statusPublished - 2007
Externally publishedYes
Event2007 15th IEEE-NPSS Real-Time Conference, RT - Batavia, IL
Duration: 2007 Apr 292007 May 4

Other

Other2007 15th IEEE-NPSS Real-Time Conference, RT
CityBatavia, IL
Period07/4/2907/5/4

Fingerprint

Pattern recognition
Pixels
Experiments
Detectors
Silicon

ASJC Scopus subject areas

  • Hardware and Architecture
  • Control and Systems Engineering

Cite this

Volpi, G., Dell'Orso, M., Crescioli, F., Punzi, G., Giannetti, P., Vivarelli, J., ... Liss, T. (2007). Performance of the proposed fast track processor for rare decays at the ATLAS experiment. In 2007 15th IEEE-NPSS Real-Time Conference, RT [4382820] https://doi.org/10.1109/RTC.2007.4382820

Performance of the proposed fast track processor for rare decays at the ATLAS experiment. / Volpi, Guido; Dell'Orso, Mauro; Crescioli, Francesco; Punzi, Giovanni; Giannetti, Paola; Vivarelli, Jacopo; Brubaker, Erik; Dunford, Monica; Kim, Young Kee; Shochet, Mel; Usai, Giulio; Yorita, Kohei; Ciobanu, Catalin; Liss, Tony.

2007 15th IEEE-NPSS Real-Time Conference, RT. 2007. 4382820.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Volpi, G, Dell'Orso, M, Crescioli, F, Punzi, G, Giannetti, P, Vivarelli, J, Brubaker, E, Dunford, M, Kim, YK, Shochet, M, Usai, G, Yorita, K, Ciobanu, C & Liss, T 2007, Performance of the proposed fast track processor for rare decays at the ATLAS experiment. in 2007 15th IEEE-NPSS Real-Time Conference, RT., 4382820, 2007 15th IEEE-NPSS Real-Time Conference, RT, Batavia, IL, 07/4/29. https://doi.org/10.1109/RTC.2007.4382820
Volpi G, Dell'Orso M, Crescioli F, Punzi G, Giannetti P, Vivarelli J et al. Performance of the proposed fast track processor for rare decays at the ATLAS experiment. In 2007 15th IEEE-NPSS Real-Time Conference, RT. 2007. 4382820 https://doi.org/10.1109/RTC.2007.4382820
Volpi, Guido ; Dell'Orso, Mauro ; Crescioli, Francesco ; Punzi, Giovanni ; Giannetti, Paola ; Vivarelli, Jacopo ; Brubaker, Erik ; Dunford, Monica ; Kim, Young Kee ; Shochet, Mel ; Usai, Giulio ; Yorita, Kohei ; Ciobanu, Catalin ; Liss, Tony. / Performance of the proposed fast track processor for rare decays at the ATLAS experiment. 2007 15th IEEE-NPSS Real-Time Conference, RT. 2007.
@inproceedings{71d11108333d4760b2254ad5cc4a1d1b,
title = "Performance of the proposed fast track processor for rare decays at the ATLAS experiment",
abstract = "The Fast Track processor (FTK)[7], [8] has been proposed for high-quality track finding at very high rates (Level-1 output rates) for the LHC experiments. Fast, efficient and precise pattern recognition has been studied using a silicon 6-layer sub-detector, including a subset of the pixel and SCT layers. We tested the FTK algorithms using the ATLAS full simulation. We compare the FTK reconstruction quality with the tracking capability of the offline IPatRec algorithm. We show that similar resolutions and efficiencies are reached by FTK at a speed higher than iPatRec by orders of magnitude. With FTK full events are reconstructed at the Level-1 output rate. Bs o → μ+μ- events are fully simulated together with background samples. We show that a low Level-2 rate is allowed by FTK, even using a single 6 GeV Level-1 muon selection trigger. FTK provides the full-resolution track list ready for the Level-2 Bs o identification. All selection cuts performed by the Event Filter can be easily anticipated at Level-2. We present the Bs o → μ+ μ- efficiency gain and related Level-2 rates.",
author = "Guido Volpi and Mauro Dell'Orso and Francesco Crescioli and Giovanni Punzi and Paola Giannetti and Jacopo Vivarelli and Erik Brubaker and Monica Dunford and Kim, {Young Kee} and Mel Shochet and Giulio Usai and Kohei Yorita and Catalin Ciobanu and Tony Liss",
year = "2007",
doi = "10.1109/RTC.2007.4382820",
language = "English",
isbn = "1424408679",
booktitle = "2007 15th IEEE-NPSS Real-Time Conference, RT",

}

TY - GEN

T1 - Performance of the proposed fast track processor for rare decays at the ATLAS experiment

AU - Volpi, Guido

AU - Dell'Orso, Mauro

AU - Crescioli, Francesco

AU - Punzi, Giovanni

AU - Giannetti, Paola

AU - Vivarelli, Jacopo

AU - Brubaker, Erik

AU - Dunford, Monica

AU - Kim, Young Kee

AU - Shochet, Mel

AU - Usai, Giulio

AU - Yorita, Kohei

AU - Ciobanu, Catalin

AU - Liss, Tony

PY - 2007

Y1 - 2007

N2 - The Fast Track processor (FTK)[7], [8] has been proposed for high-quality track finding at very high rates (Level-1 output rates) for the LHC experiments. Fast, efficient and precise pattern recognition has been studied using a silicon 6-layer sub-detector, including a subset of the pixel and SCT layers. We tested the FTK algorithms using the ATLAS full simulation. We compare the FTK reconstruction quality with the tracking capability of the offline IPatRec algorithm. We show that similar resolutions and efficiencies are reached by FTK at a speed higher than iPatRec by orders of magnitude. With FTK full events are reconstructed at the Level-1 output rate. Bs o → μ+μ- events are fully simulated together with background samples. We show that a low Level-2 rate is allowed by FTK, even using a single 6 GeV Level-1 muon selection trigger. FTK provides the full-resolution track list ready for the Level-2 Bs o identification. All selection cuts performed by the Event Filter can be easily anticipated at Level-2. We present the Bs o → μ+ μ- efficiency gain and related Level-2 rates.

AB - The Fast Track processor (FTK)[7], [8] has been proposed for high-quality track finding at very high rates (Level-1 output rates) for the LHC experiments. Fast, efficient and precise pattern recognition has been studied using a silicon 6-layer sub-detector, including a subset of the pixel and SCT layers. We tested the FTK algorithms using the ATLAS full simulation. We compare the FTK reconstruction quality with the tracking capability of the offline IPatRec algorithm. We show that similar resolutions and efficiencies are reached by FTK at a speed higher than iPatRec by orders of magnitude. With FTK full events are reconstructed at the Level-1 output rate. Bs o → μ+μ- events are fully simulated together with background samples. We show that a low Level-2 rate is allowed by FTK, even using a single 6 GeV Level-1 muon selection trigger. FTK provides the full-resolution track list ready for the Level-2 Bs o identification. All selection cuts performed by the Event Filter can be easily anticipated at Level-2. We present the Bs o → μ+ μ- efficiency gain and related Level-2 rates.

UR - http://www.scopus.com/inward/record.url?scp=50249180762&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=50249180762&partnerID=8YFLogxK

U2 - 10.1109/RTC.2007.4382820

DO - 10.1109/RTC.2007.4382820

M3 - Conference contribution

SN - 1424408679

SN - 9781424408672

BT - 2007 15th IEEE-NPSS Real-Time Conference, RT

ER -