Post-scheduling frequency assignment for energy-efficient high-level synthesis

Ru Liu, Song Chen, Takeshi Yoshimura

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Abstract

The technique of multiple supply voltages and dynamic frequency has been explored as a possible energy-efficient strategy in CMOS circuits. In this paper, we consider the technique in the scheduling process which is the keys of high level synthesis. Given a schedule, a novel method is presented for the frequency assignment. The objective is to decrease the energy consumption as much as possible without violating the timing constraints. Initially, an approach based on the convex cost integer network flow is proposed to generate a feasible initial frequency assignment solution. Secondly, a branch and bound method is used to improve the initial solution. Finally, due to the frequency assignment result, we perform the assignment of voltage to each function operation in the control steps. The experimental results show the effectiveness of the proposed method. It is observed that using three supply voltage levels (5V; 3.3V; 2.4V ), an average energy savings of 25% to 40% (with the time constraint of 1.5 to 2.0 times the critical path) is obtained as compared to using a single-frequency clocking scheme with a single supply voltage.

Original languageEnglish
Title of host publicationIEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS
Pages588-591
Number of pages4
DOIs
Publication statusPublished - 2010
Event2010 Asia Pacific Conference on Circuit and System, APCCAS 2010 - Kuala Lumpur
Duration: 2010 Dec 62010 Dec 9

Other

Other2010 Asia Pacific Conference on Circuit and System, APCCAS 2010
CityKuala Lumpur
Period10/12/610/12/9

Fingerprint

Scheduling
Electric potential
Branch and bound method
Energy conservation
Energy utilization
High level synthesis
Networks (circuits)
Costs

Keywords

  • Dynamic frequency scaling
  • Energy
  • high-level synthesis
  • Multiple supply voltages
  • scheduling

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

Cite this

Liu, R., Chen, S., & Yoshimura, T. (2010). Post-scheduling frequency assignment for energy-efficient high-level synthesis. In IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS (pp. 588-591). [5774921] https://doi.org/10.1109/APCCAS.2010.5774921

Post-scheduling frequency assignment for energy-efficient high-level synthesis. / Liu, Ru; Chen, Song; Yoshimura, Takeshi.

IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS. 2010. p. 588-591 5774921.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Liu, R, Chen, S & Yoshimura, T 2010, Post-scheduling frequency assignment for energy-efficient high-level synthesis. in IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS., 5774921, pp. 588-591, 2010 Asia Pacific Conference on Circuit and System, APCCAS 2010, Kuala Lumpur, 10/12/6. https://doi.org/10.1109/APCCAS.2010.5774921
Liu R, Chen S, Yoshimura T. Post-scheduling frequency assignment for energy-efficient high-level synthesis. In IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS. 2010. p. 588-591. 5774921 https://doi.org/10.1109/APCCAS.2010.5774921
Liu, Ru ; Chen, Song ; Yoshimura, Takeshi. / Post-scheduling frequency assignment for energy-efficient high-level synthesis. IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS. 2010. pp. 588-591
@inproceedings{af5ed1e37eb34027900a882de0232efb,
title = "Post-scheduling frequency assignment for energy-efficient high-level synthesis",
abstract = "The technique of multiple supply voltages and dynamic frequency has been explored as a possible energy-efficient strategy in CMOS circuits. In this paper, we consider the technique in the scheduling process which is the keys of high level synthesis. Given a schedule, a novel method is presented for the frequency assignment. The objective is to decrease the energy consumption as much as possible without violating the timing constraints. Initially, an approach based on the convex cost integer network flow is proposed to generate a feasible initial frequency assignment solution. Secondly, a branch and bound method is used to improve the initial solution. Finally, due to the frequency assignment result, we perform the assignment of voltage to each function operation in the control steps. The experimental results show the effectiveness of the proposed method. It is observed that using three supply voltage levels (5V; 3.3V; 2.4V ), an average energy savings of 25{\%} to 40{\%} (with the time constraint of 1.5 to 2.0 times the critical path) is obtained as compared to using a single-frequency clocking scheme with a single supply voltage.",
keywords = "Dynamic frequency scaling, Energy, high-level synthesis, Multiple supply voltages, scheduling",
author = "Ru Liu and Song Chen and Takeshi Yoshimura",
year = "2010",
doi = "10.1109/APCCAS.2010.5774921",
language = "English",
isbn = "9781424474561",
pages = "588--591",
booktitle = "IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS",

}

TY - GEN

T1 - Post-scheduling frequency assignment for energy-efficient high-level synthesis

AU - Liu, Ru

AU - Chen, Song

AU - Yoshimura, Takeshi

PY - 2010

Y1 - 2010

N2 - The technique of multiple supply voltages and dynamic frequency has been explored as a possible energy-efficient strategy in CMOS circuits. In this paper, we consider the technique in the scheduling process which is the keys of high level synthesis. Given a schedule, a novel method is presented for the frequency assignment. The objective is to decrease the energy consumption as much as possible without violating the timing constraints. Initially, an approach based on the convex cost integer network flow is proposed to generate a feasible initial frequency assignment solution. Secondly, a branch and bound method is used to improve the initial solution. Finally, due to the frequency assignment result, we perform the assignment of voltage to each function operation in the control steps. The experimental results show the effectiveness of the proposed method. It is observed that using three supply voltage levels (5V; 3.3V; 2.4V ), an average energy savings of 25% to 40% (with the time constraint of 1.5 to 2.0 times the critical path) is obtained as compared to using a single-frequency clocking scheme with a single supply voltage.

AB - The technique of multiple supply voltages and dynamic frequency has been explored as a possible energy-efficient strategy in CMOS circuits. In this paper, we consider the technique in the scheduling process which is the keys of high level synthesis. Given a schedule, a novel method is presented for the frequency assignment. The objective is to decrease the energy consumption as much as possible without violating the timing constraints. Initially, an approach based on the convex cost integer network flow is proposed to generate a feasible initial frequency assignment solution. Secondly, a branch and bound method is used to improve the initial solution. Finally, due to the frequency assignment result, we perform the assignment of voltage to each function operation in the control steps. The experimental results show the effectiveness of the proposed method. It is observed that using three supply voltage levels (5V; 3.3V; 2.4V ), an average energy savings of 25% to 40% (with the time constraint of 1.5 to 2.0 times the critical path) is obtained as compared to using a single-frequency clocking scheme with a single supply voltage.

KW - Dynamic frequency scaling

KW - Energy

KW - high-level synthesis

KW - Multiple supply voltages

KW - scheduling

UR - http://www.scopus.com/inward/record.url?scp=79959221056&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=79959221056&partnerID=8YFLogxK

U2 - 10.1109/APCCAS.2010.5774921

DO - 10.1109/APCCAS.2010.5774921

M3 - Conference contribution

AN - SCOPUS:79959221056

SN - 9781424474561

SP - 588

EP - 591

BT - IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS

ER -