Post-silicon clock deskew employing hot-carrier injection trimming with on-chip skew monitoring and auto-stressing scheme for sub/near threshold digital circuits

Yu Pu, Xin Zhang, Katsuyuki Ikeuchi, Atsushi Muramatsu, Atsushi Kawasumi, Makoto Takamiya, Masahiro Nomura, Hirofumi Shinohara, Takayasu Sakurai

Research output: Contribution to journalArticle


Clock skew is a major cause of severe timing yield degradation for sub-/near-threshold digital circuits. We report for the first time on employing hot-carrier injection (HCI) for post-silicon clock-deskew trimming. An HCI trimmed clock buffer, which can be individually selected and stressed to adjust the clock edge, is proposed. In addition, it can be used in conjunction with on-chip skew monitoring circuits to achieve auto-stressing. Our approach is proven to be effective through a representative 1.1-mm × 0.8-mm clock tree in a 40-nm high-k complimentary metal-oxide-semiconductor process. On average, it reduces the clock skew by eight times at 0.4 V V\rm dd. No significant recovery is noticed two weeks after trimming.

Original languageEnglish
Article number5772921
Pages (from-to)294-298
Number of pages5
JournalIEEE Transactions on Circuits and Systems II: Express Briefs
Issue number5
Publication statusPublished - 2011 May
Externally publishedYes



  • Clock skew
  • hot-carrier injection (HCI)
  • post-silicon tuning
  • sub-/near-threshold

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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