Process variation estimation using a combination of ring oscillator delay and FlipFlop retention characteristics

Takuma Konno, Shinichi Nishizawa, Kazuhito Ito

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Abstract

We propose an extraction method of process variation utilizing D-Flip-Flop (DFF) data retention characteristics and Ring Oscillator(RO) oscillation delay. Extracted process variation is modeled as PMOS and NMOS threshold voltage variations. Retention characteristics of the DFF circuit has different sensitivity to threshold voltage variation from the RO circuit. A DFF circuit is newly introduced as a complementary test structure of the conventional RO circuit for process variation extraction. By combining the RO circuit and the DFF circuits, we can accurately estimate the shift of global process variation. The test structure is implemented into silicon chip and the amount of global variation shift is extracted from measured data.

Original languageEnglish
Title of host publicationICMTS 2018 - Proceedings of the 2018 IEEE International Conference on Microelectronic Test Structures
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages97-101
Number of pages5
ISBN (Electronic)9781538650691
DOIs
Publication statusPublished - 2018 Jun 12
Externally publishedYes
Event2018 IEEE International Conference on Microelectronic Test Structures, ICMTS 2018 - Austin, United States
Duration: 2018 Mar 192018 Mar 22

Publication series

NameIEEE International Conference on Microelectronic Test Structures
Volume2018-March

Conference

Conference2018 IEEE International Conference on Microelectronic Test Structures, ICMTS 2018
Country/TerritoryUnited States
CityAustin
Period18/3/1918/3/22

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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