Reachable Set Analysis of Linear Time-Delay Systems and Application toConstrained H∞Controller Synthesis

Kojiro Ikeda, Kenko Uchida

    Research output: Contribution to journalArticle

    Abstract

    In this paper, a new notion of reachable set for linear time-delay systems is introduced and a method to evaluate the reachable set is proposed. The evaluation method is given in linear matrix inequality form. An important application of reachable set analisys is constrained controller synthesis. We also propose synthesis method of constrained H∞ controllers for time-delay systems.

    Original languageEnglish
    Pages (from-to)50-56
    Number of pages7
    JournalIEEJ Transactions on Electronics, Information and Systems
    Volume123
    Issue number1
    DOIs
    Publication statusPublished - 2003 Jan 1

    Fingerprint

    Time delay
    Controllers
    Linear matrix inequalities

    Keywords

    • input constraint
    • state reachable set
    • time-delay systems

    ASJC Scopus subject areas

    • Electrical and Electronic Engineering

    Cite this

    @article{f788d4bad6d64788b440ef2bcf0fb617,
    title = "Reachable Set Analysis of Linear Time-Delay Systems and Application toConstrained H∞Controller Synthesis",
    abstract = "In this paper, a new notion of reachable set for linear time-delay systems is introduced and a method to evaluate the reachable set is proposed. The evaluation method is given in linear matrix inequality form. An important application of reachable set analisys is constrained controller synthesis. We also propose synthesis method of constrained H∞ controllers for time-delay systems.",
    keywords = "input constraint, state reachable set, time-delay systems",
    author = "Kojiro Ikeda and Kenko Uchida",
    year = "2003",
    month = "1",
    day = "1",
    doi = "10.1541/ieejeiss.123.50",
    language = "English",
    volume = "123",
    pages = "50--56",
    journal = "IEEJ Transactions on Electronics, Information and Systems",
    issn = "0385-4221",
    publisher = "The Institute of Electrical Engineers of Japan",
    number = "1",

    }

    TY - JOUR

    T1 - Reachable Set Analysis of Linear Time-Delay Systems and Application toConstrained H∞Controller Synthesis

    AU - Ikeda, Kojiro

    AU - Uchida, Kenko

    PY - 2003/1/1

    Y1 - 2003/1/1

    N2 - In this paper, a new notion of reachable set for linear time-delay systems is introduced and a method to evaluate the reachable set is proposed. The evaluation method is given in linear matrix inequality form. An important application of reachable set analisys is constrained controller synthesis. We also propose synthesis method of constrained H∞ controllers for time-delay systems.

    AB - In this paper, a new notion of reachable set for linear time-delay systems is introduced and a method to evaluate the reachable set is proposed. The evaluation method is given in linear matrix inequality form. An important application of reachable set analisys is constrained controller synthesis. We also propose synthesis method of constrained H∞ controllers for time-delay systems.

    KW - input constraint

    KW - state reachable set

    KW - time-delay systems

    UR - http://www.scopus.com/inward/record.url?scp=85024748028&partnerID=8YFLogxK

    UR - http://www.scopus.com/inward/citedby.url?scp=85024748028&partnerID=8YFLogxK

    U2 - 10.1541/ieejeiss.123.50

    DO - 10.1541/ieejeiss.123.50

    M3 - Article

    AN - SCOPUS:85024748028

    VL - 123

    SP - 50

    EP - 56

    JO - IEEJ Transactions on Electronics, Information and Systems

    JF - IEEJ Transactions on Electronics, Information and Systems

    SN - 0385-4221

    IS - 1

    ER -