Reconfigurable circuit design based on arithmetic logic unit using double-gate cntfets

Hiroshi Ninomiya, Manabu Kobayashi, Yasuyuki Miura, Shigeyoshi Watanabe

Research output: Contribution to journalArticle

Abstract

This letter describes a design methodology for an arithmetic logic unit (ALU) incorporating reconfigurability based on doublegate carbon nanotube field-effect transistors (DG-CNTFETs). The design of a DG-CNTFET with an ambipolar-property-based reconfigurable static logic circuit is simple and straightforward using an ambipolar binary decision diagram (Am-BDD), which represents the cornerstone for the automatic pass transistor logic (PTL) synthesis flows of ambipolar devices. In this work, an ALU with 16 functions is synthesized by the design methodology of a DG-CNTFET-based reconfigurable static logic circuit. Furthermore, it is shown that the proposed ALU is much more flexible and practical than a conventional DG-CNTFET-based reconfigurable ALU.

Original languageEnglish
Pages (from-to)675-678
Number of pages4
JournalIEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
VolumeE97-A
Issue number2
DOIs
Publication statusPublished - 2014 Jan 1

Keywords

  • Ambipolar device
  • Arithmetic logic unit
  • Binary decision diagram
  • Doublegate CNTFET
  • Reconfigurable logic circuit design

ASJC Scopus subject areas

  • Signal Processing
  • Computer Graphics and Computer-Aided Design
  • Electrical and Electronic Engineering
  • Applied Mathematics

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