Reducing parallelizing compilation time by removing redundant analysis

Ji xin Han, Rina Fujino, Ryota Tamura, Mamoru Shimaoka, Hiroki Mikami, Moriyuki Takamura, Sachio Kamiya, Kazuhiko Suzuki, Takahiro Miyajima, Keiji Kimura, Hironori Kasahara

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Parallelizing compilers employing powerful compiler optimizations are essential tools to fully exploit performance from today's computer systems. These optimizations are supported by both highly sophisticated program analysis techniques and aggressive program restructuring techniques. However, the compilation time for such powerful compilers becomes larger and larger for real commercial application due to these strong program analysis techniques. In this paper, we propose a compilation time reduction technique for parallelizing compilers. The basic idea of the proposed technique is based on an observation that parallelizing compilers apply multiple program analysis passes and restructuring passes to a source program but all program analysis passes do not have to be applied to the whole source program. Thus, there is an opportunity for compilation time reduction by removing redundant program analysis. We describe the removing redundant program analysis techniques considering the inter-procedural propagation of analysis update information in this paper. We implement the proposed technique into OSCAR automatically multigrain parallelizing compiler. We then evaluate the proposed technique by using three proprietary large scale programs. The proposed technique can remove 37.7% of program analysis time on average for basic analysis includes def-use analysis and dependence calculation, and 51.7% for pointer analysis, respectively.

Original languageEnglish
Title of host publicationSEPS 2016 - Proceedings of the 3rd International Workshop on Software Engineering for Parallel Systems, co-located with SPLASH 2016
PublisherAssociation for Computing Machinery, Inc
Pages1-9
Number of pages9
ISBN (Electronic)9781450346412
DOIs
Publication statusPublished - 2016 Oct 21
Event3rd International Workshop on Software Engineering for Parallel Systems, SEPS 2016 - Amsterdam, Netherlands
Duration: 2016 Nov 1 → …

Other

Other3rd International Workshop on Software Engineering for Parallel Systems, SEPS 2016
CountryNetherlands
CityAmsterdam
Period16/11/1 → …

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Information analysis
Computer systems

Keywords

  • Parallelizing compiler
  • Program analysis
  • Program optimizations

ASJC Scopus subject areas

  • Software
  • Hardware and Architecture
  • Computational Theory and Mathematics

Cite this

Han, J. X., Fujino, R., Tamura, R., Shimaoka, M., Mikami, H., Takamura, M., ... Kasahara, H. (2016). Reducing parallelizing compilation time by removing redundant analysis. In SEPS 2016 - Proceedings of the 3rd International Workshop on Software Engineering for Parallel Systems, co-located with SPLASH 2016 (pp. 1-9). Association for Computing Machinery, Inc. https://doi.org/10.1145/3002125.3002129

Reducing parallelizing compilation time by removing redundant analysis. / Han, Ji xin; Fujino, Rina; Tamura, Ryota; Shimaoka, Mamoru; Mikami, Hiroki; Takamura, Moriyuki; Kamiya, Sachio; Suzuki, Kazuhiko; Miyajima, Takahiro; Kimura, Keiji; Kasahara, Hironori.

SEPS 2016 - Proceedings of the 3rd International Workshop on Software Engineering for Parallel Systems, co-located with SPLASH 2016. Association for Computing Machinery, Inc, 2016. p. 1-9.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Han, JX, Fujino, R, Tamura, R, Shimaoka, M, Mikami, H, Takamura, M, Kamiya, S, Suzuki, K, Miyajima, T, Kimura, K & Kasahara, H 2016, Reducing parallelizing compilation time by removing redundant analysis. in SEPS 2016 - Proceedings of the 3rd International Workshop on Software Engineering for Parallel Systems, co-located with SPLASH 2016. Association for Computing Machinery, Inc, pp. 1-9, 3rd International Workshop on Software Engineering for Parallel Systems, SEPS 2016, Amsterdam, Netherlands, 16/11/1. https://doi.org/10.1145/3002125.3002129
Han JX, Fujino R, Tamura R, Shimaoka M, Mikami H, Takamura M et al. Reducing parallelizing compilation time by removing redundant analysis. In SEPS 2016 - Proceedings of the 3rd International Workshop on Software Engineering for Parallel Systems, co-located with SPLASH 2016. Association for Computing Machinery, Inc. 2016. p. 1-9 https://doi.org/10.1145/3002125.3002129
Han, Ji xin ; Fujino, Rina ; Tamura, Ryota ; Shimaoka, Mamoru ; Mikami, Hiroki ; Takamura, Moriyuki ; Kamiya, Sachio ; Suzuki, Kazuhiko ; Miyajima, Takahiro ; Kimura, Keiji ; Kasahara, Hironori. / Reducing parallelizing compilation time by removing redundant analysis. SEPS 2016 - Proceedings of the 3rd International Workshop on Software Engineering for Parallel Systems, co-located with SPLASH 2016. Association for Computing Machinery, Inc, 2016. pp. 1-9
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