Redundant via insertion: Removing design rule conflicts and balancing via density

Song Chen, Jianwei Shen, Wei Guo, Mei Fang Chiang, Takeshi Yoshimura

Research output: Contribution to journalArticle

2 Citations (Scopus)

Abstract

The occurrence of via defects increases due to the shrinking size in integrated circuit manufacturing. Redundant via insertion is an effective and recommended method to reduce the yield loss caused by via failures. In this paper, we introduce the redundant via allocation problem for layer partition-based redundant via insertion methods [1] and solve it using the genetic algorithm. At the same time, we use a convex-cost flow model to equilibrate the via density, which is good for the via density rules. The results of layer partition-based model depend on the partition and processing order of metal layers. Furthermore, even we try all of partitions and processing orders, we might miss the optimal solutions. By introducing the redundant via allocation problem on partitioning boundaries, we can avoid the sub-optimality of the original layer-partition based method. The experimental results show that the proposed method got 12 more redundant vias inserted on average and the via density balance can be greatly improved.

Original languageEnglish
Pages (from-to)2372-2379
Number of pages8
JournalIEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
VolumeE93-A
Issue number12
DOIs
Publication statusPublished - 2010 Dec

Keywords

  • Design for manufacturability
  • Double via
  • Redundant via
  • Via density

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Computer Graphics and Computer-Aided Design
  • Applied Mathematics
  • Signal Processing

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