Scaling scenario of floating body cell (FBC) suppressing Vth variation due to random dopant fluctuation

Hironobu Furuhashi, Tomoaki Shino, Takashi Ohsawa, Fumiyoshi Matsuoka, Tomoki Higashi, Yoshihiro Minami, Hiroomi Nakajima, Katsuyuki Fujita, Ryo Fukuda, Takeshi Hamamoto, Akihiro Nitayama

Research output: Chapter in Book/Report/Conference proceedingConference contribution

14 Citations (Scopus)

Abstract

A scaling scenario of fully-depleted floating body cell (FBC) is demonstrated in view of signal margin for stable array functionality. Measurement and numerical simulation reveal that the Vth variation of cell array transistors is mainly attributed to the random dopant fluctuation in channel region. By setting the channel impurity concentration in the order of 1016cm-3 or lower, Gbit array functionality is guaranteed for the 32nm node and further scaled generations.

Original languageEnglish
Title of host publication2008 IEEE International SOI Conference Proceedings
Pages33-34
Number of pages2
DOIs
Publication statusPublished - 2008 Dec 24
Event2008 IEEE International SOI Conference - New Paltz, NY, United States
Duration: 2008 Oct 62008 Oct 9

Publication series

NameProceedings - IEEE International SOI Conference
ISSN (Print)1078-621X

Other

Other2008 IEEE International SOI Conference
CountryUnited States
CityNew Paltz, NY
Period08/10/608/10/9

    Fingerprint

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

Cite this

Furuhashi, H., Shino, T., Ohsawa, T., Matsuoka, F., Higashi, T., Minami, Y., Nakajima, H., Fujita, K., Fukuda, R., Hamamoto, T., & Nitayama, A. (2008). Scaling scenario of floating body cell (FBC) suppressing Vth variation due to random dopant fluctuation. In 2008 IEEE International SOI Conference Proceedings (pp. 33-34). [4656281] (Proceedings - IEEE International SOI Conference). https://doi.org/10.1109/SOI.2008.4656281