Secure scan design using improved random order and its evaluations

Masaru Oya, Yuta Atobe, Youhua Shi, Masao Yanagisawa, Nozomu Togawa

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    4 Citations (Scopus)

    Abstract

    Scan test using scan chains is one of the most important DFT techniques. However, scan-based attacks are reported which can retrieve the secret key in crypto circuits by using scan chains. Secure scan architecture is strongly required to protect scan chains from scan-based attacks. This paper proposes an improved version of random order as a secure scan architecture. In improved random order, a scan chain is partitioned into multiple sub-chains. The structure of the scan chain changes dynamically by selecting a subchain to scan out. Testability and security of the proposed improved random order are also discussed in the paper, and the implementation results demonstrate the effectiveness of the proposed method.

    Original languageEnglish
    Title of host publicationIEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS
    PublisherInstitute of Electrical and Electronics Engineers Inc.
    Pages555-558
    Number of pages4
    Volume2015-February
    EditionFebruary
    DOIs
    Publication statusPublished - 2015 Feb 5
    Event2014 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2014 - Ishigaki Island, Okinawa, Japan
    Duration: 2014 Nov 172014 Nov 20

    Other

    Other2014 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2014
    CountryJapan
    CityIshigaki Island, Okinawa
    Period14/11/1714/11/20

    Fingerprint

    Discrete Fourier transforms
    Networks (circuits)

    Keywords

    • scan chains
    • scan-based attack
    • secure cryptro circuit
    • secure scan architecture

    ASJC Scopus subject areas

    • Electrical and Electronic Engineering

    Cite this

    Oya, M., Atobe, Y., Shi, Y., Yanagisawa, M., & Togawa, N. (2015). Secure scan design using improved random order and its evaluations. In IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS (February ed., Vol. 2015-February, pp. 555-558). [7032842] Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/APCCAS.2014.7032842

    Secure scan design using improved random order and its evaluations. / Oya, Masaru; Atobe, Yuta; Shi, Youhua; Yanagisawa, Masao; Togawa, Nozomu.

    IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS. Vol. 2015-February February. ed. Institute of Electrical and Electronics Engineers Inc., 2015. p. 555-558 7032842.

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    Oya, M, Atobe, Y, Shi, Y, Yanagisawa, M & Togawa, N 2015, Secure scan design using improved random order and its evaluations. in IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS. February edn, vol. 2015-February, 7032842, Institute of Electrical and Electronics Engineers Inc., pp. 555-558, 2014 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2014, Ishigaki Island, Okinawa, Japan, 14/11/17. https://doi.org/10.1109/APCCAS.2014.7032842
    Oya M, Atobe Y, Shi Y, Yanagisawa M, Togawa N. Secure scan design using improved random order and its evaluations. In IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS. February ed. Vol. 2015-February. Institute of Electrical and Electronics Engineers Inc. 2015. p. 555-558. 7032842 https://doi.org/10.1109/APCCAS.2014.7032842
    Oya, Masaru ; Atobe, Yuta ; Shi, Youhua ; Yanagisawa, Masao ; Togawa, Nozomu. / Secure scan design using improved random order and its evaluations. IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS. Vol. 2015-February February. ed. Institute of Electrical and Electronics Engineers Inc., 2015. pp. 555-558
    @inproceedings{14c87035994a4195911c5828b34a10b0,
    title = "Secure scan design using improved random order and its evaluations",
    abstract = "Scan test using scan chains is one of the most important DFT techniques. However, scan-based attacks are reported which can retrieve the secret key in crypto circuits by using scan chains. Secure scan architecture is strongly required to protect scan chains from scan-based attacks. This paper proposes an improved version of random order as a secure scan architecture. In improved random order, a scan chain is partitioned into multiple sub-chains. The structure of the scan chain changes dynamically by selecting a subchain to scan out. Testability and security of the proposed improved random order are also discussed in the paper, and the implementation results demonstrate the effectiveness of the proposed method.",
    keywords = "scan chains, scan-based attack, secure cryptro circuit, secure scan architecture",
    author = "Masaru Oya and Yuta Atobe and Youhua Shi and Masao Yanagisawa and Nozomu Togawa",
    year = "2015",
    month = "2",
    day = "5",
    doi = "10.1109/APCCAS.2014.7032842",
    language = "English",
    volume = "2015-February",
    pages = "555--558",
    booktitle = "IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS",
    publisher = "Institute of Electrical and Electronics Engineers Inc.",
    edition = "February",

    }

    TY - GEN

    T1 - Secure scan design using improved random order and its evaluations

    AU - Oya, Masaru

    AU - Atobe, Yuta

    AU - Shi, Youhua

    AU - Yanagisawa, Masao

    AU - Togawa, Nozomu

    PY - 2015/2/5

    Y1 - 2015/2/5

    N2 - Scan test using scan chains is one of the most important DFT techniques. However, scan-based attacks are reported which can retrieve the secret key in crypto circuits by using scan chains. Secure scan architecture is strongly required to protect scan chains from scan-based attacks. This paper proposes an improved version of random order as a secure scan architecture. In improved random order, a scan chain is partitioned into multiple sub-chains. The structure of the scan chain changes dynamically by selecting a subchain to scan out. Testability and security of the proposed improved random order are also discussed in the paper, and the implementation results demonstrate the effectiveness of the proposed method.

    AB - Scan test using scan chains is one of the most important DFT techniques. However, scan-based attacks are reported which can retrieve the secret key in crypto circuits by using scan chains. Secure scan architecture is strongly required to protect scan chains from scan-based attacks. This paper proposes an improved version of random order as a secure scan architecture. In improved random order, a scan chain is partitioned into multiple sub-chains. The structure of the scan chain changes dynamically by selecting a subchain to scan out. Testability and security of the proposed improved random order are also discussed in the paper, and the implementation results demonstrate the effectiveness of the proposed method.

    KW - scan chains

    KW - scan-based attack

    KW - secure cryptro circuit

    KW - secure scan architecture

    UR - http://www.scopus.com/inward/record.url?scp=84937857893&partnerID=8YFLogxK

    UR - http://www.scopus.com/inward/citedby.url?scp=84937857893&partnerID=8YFLogxK

    U2 - 10.1109/APCCAS.2014.7032842

    DO - 10.1109/APCCAS.2014.7032842

    M3 - Conference contribution

    AN - SCOPUS:84937857893

    VL - 2015-February

    SP - 555

    EP - 558

    BT - IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS

    PB - Institute of Electrical and Electronics Engineers Inc.

    ER -