Self-compensating power supply circuit for low voltage SOI

Leona Okamura, Fukashi Morishita, Katsumi Dosaka, Kazutami Arimoto, Tsutomu Yoshihara

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    Abstract

    SOI device is promised to be a mobile and wireless network applications as it has better potential of high speed, low operating voltage and Q-factor. Gate Body directly connected SOI MOSFET suppresses Sees historical effects and is promised technologies that let the logic circuitry work in ultra low voltage. Compared to Bulk-Si MOSFET, GBSOI can reduce its power supply voltage by 30%, its current by 26% and its power dissipation by 47%. However sub-Gbps level clocking circuits with ultra low voltage require the smaller PVT (process, voltage and temperature) variation. This paper presents an architecture to stabilize SOI logic circuitry against PVT variation especially under ultra low power supply voltage. Deviation of gate delay caused by PVT variation is reduced to 1.6%, while 40% with Bulk-Si. This system realizes the cell libraries whose gate delay is constant despite PVT variation. They greatly help designing circuitry especially under ultra low voltage.

    Original languageEnglish
    Title of host publicationICCCAS 2007 - International Conference on Communications, Circuits and Systems 2007
    Pages1039-1043
    Number of pages5
    Publication statusPublished - 2008
    EventICCCAS 2007 - International Conference on Communications, Circuits and Systems 2007 - Kokura
    Duration: 2007 Jul 112007 Jul 13

    Other

    OtherICCCAS 2007 - International Conference on Communications, Circuits and Systems 2007
    CityKokura
    Period07/7/1107/7/13

    Fingerprint

    Power supply circuits
    Electric potential
    Wireless networks
    Temperature
    Energy dissipation

    ASJC Scopus subject areas

    • Electrical and Electronic Engineering

    Cite this

    Okamura, L., Morishita, F., Dosaka, K., Arimoto, K., & Yoshihara, T. (2008). Self-compensating power supply circuit for low voltage SOI. In ICCCAS 2007 - International Conference on Communications, Circuits and Systems 2007 (pp. 1039-1043). [4348224]

    Self-compensating power supply circuit for low voltage SOI. / Okamura, Leona; Morishita, Fukashi; Dosaka, Katsumi; Arimoto, Kazutami; Yoshihara, Tsutomu.

    ICCCAS 2007 - International Conference on Communications, Circuits and Systems 2007. 2008. p. 1039-1043 4348224.

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    Okamura, L, Morishita, F, Dosaka, K, Arimoto, K & Yoshihara, T 2008, Self-compensating power supply circuit for low voltage SOI. in ICCCAS 2007 - International Conference on Communications, Circuits and Systems 2007., 4348224, pp. 1039-1043, ICCCAS 2007 - International Conference on Communications, Circuits and Systems 2007, Kokura, 07/7/11.
    Okamura L, Morishita F, Dosaka K, Arimoto K, Yoshihara T. Self-compensating power supply circuit for low voltage SOI. In ICCCAS 2007 - International Conference on Communications, Circuits and Systems 2007. 2008. p. 1039-1043. 4348224
    Okamura, Leona ; Morishita, Fukashi ; Dosaka, Katsumi ; Arimoto, Kazutami ; Yoshihara, Tsutomu. / Self-compensating power supply circuit for low voltage SOI. ICCCAS 2007 - International Conference on Communications, Circuits and Systems 2007. 2008. pp. 1039-1043
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