Small-sized and noise-reducing power analyzer design for low-power IoT devices

Ryosuke Kitayama; Takashi Takenaka; Masao Yanagisawa; Nozomu Togawa

doi:10.1109/ASICON.2015.7516927

Small-sized and noise-reducing power analyzer design for low-power IoT devices

Ryosuke Kitayama, Takashi Takenaka, Masao Yanagisawa, Nozomu Togawa

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

2 Citations (Scopus)

Abstract

Power analysis for IoT devices is strongly required to reduce power consumption and realize secure communications, where we need a small-sized power analyzer that can reduce a wide frequency range of noises is needed. In this paper, we propose a small-sized and noise-reduced power analyzer for IoT devices. We utilize a signal averaging method to reduce a wide frequency range of noises. At that time, how to implement a synchronous process between a power analyzer and a target IoT device becomes the key problem. We solve this problem by (a) using synchronization signals generated by a general-purpose I/O interface of a microprocessor and (b) introducing a data-order correction process. We analyze power/energy consumption of the encryption process of LED block cipher on the IoT device and obtain an average power of 146.3mW and energy of 3.84mJ. The proposed power analyzer is just implemented on a 5cm × 5cm board but these results only have 5% errors compared to a high-precision oscilloscope.

Original language	English
Title of host publication	Proceedings - 2015 IEEE 11th International Conference on ASIC, ASICON 2015
Publisher	Institute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)	9781479984831
DOIs	https://doi.org/10.1109/ASICON.2015.7516927
Publication status	Published - 2016 Jul 19
Event	11th IEEE International Conference on Advanced Semiconductor Integrated Circuits (ASIC), ASICON 2015 - Chengdu, China Duration: 2015 Nov 3 → 2015 Nov 6

Other

Other	11th IEEE International Conference on Advanced Semiconductor Integrated Circuits (ASIC), ASICON 2015
Country	China
City	Chengdu
Period	15/11/3 → 15/11/6

ASJC Scopus subject areas

Hardware and Architecture
Electrical and Electronic Engineering

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Small-sized and noise-reducing power analyzer design for low-power IoT devices. / Kitayama, Ryosuke; Takenaka, Takashi; Yanagisawa, Masao ; Togawa, Nozomu.

Proceedings - 2015 IEEE 11th International Conference on ASIC, ASICON 2015. Institute of Electrical and Electronics Engineers Inc., 2016. 7516927.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Kitayama, R, Takenaka, T, Yanagisawa, M & Togawa, N 2016, Small-sized and noise-reducing power analyzer design for low-power IoT devices. in Proceedings - 2015 IEEE 11th International Conference on ASIC, ASICON 2015., 7516927, Institute of Electrical and Electronics Engineers Inc., 11th IEEE International Conference on Advanced Semiconductor Integrated Circuits (ASIC), ASICON 2015, Chengdu, China, 15/11/3. https://doi.org/10.1109/ASICON.2015.7516927

@inproceedings{0a7f96df2fe747f4809bd4df92ee55a4,

title = "Small-sized and noise-reducing power analyzer design for low-power IoT devices",

abstract = "Power analysis for IoT devices is strongly required to reduce power consumption and realize secure communications, where we need a small-sized power analyzer that can reduce a wide frequency range of noises is needed. In this paper, we propose a small-sized and noise-reduced power analyzer for IoT devices. We utilize a signal averaging method to reduce a wide frequency range of noises. At that time, how to implement a synchronous process between a power analyzer and a target IoT device becomes the key problem. We solve this problem by (a) using synchronization signals generated by a general-purpose I/O interface of a microprocessor and (b) introducing a data-order correction process. We analyze power/energy consumption of the encryption process of LED block cipher on the IoT device and obtain an average power of 146.3mW and energy of 3.84mJ. The proposed power analyzer is just implemented on a 5cm × 5cm board but these results only have 5% errors compared to a high-precision oscilloscope.",

author = "Ryosuke Kitayama and Takashi Takenaka and Masao Yanagisawa and Nozomu Togawa",

year = "2016",

month = jul,

day = "19",

doi = "10.1109/ASICON.2015.7516927",

language = "English",

booktitle = "Proceedings - 2015 IEEE 11th International Conference on ASIC, ASICON 2015",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

address = "United States",

note = "11th IEEE International Conference on Advanced Semiconductor Integrated Circuits (ASIC), ASICON 2015 ; Conference date: 03-11-2015 Through 06-11-2015",

}

TY - GEN

T1 - Small-sized and noise-reducing power analyzer design for low-power IoT devices

AU - Kitayama, Ryosuke

AU - Takenaka, Takashi

AU - Yanagisawa, Masao

AU - Togawa, Nozomu

PY - 2016/7/19

Y1 - 2016/7/19

N2 - Power analysis for IoT devices is strongly required to reduce power consumption and realize secure communications, where we need a small-sized power analyzer that can reduce a wide frequency range of noises is needed. In this paper, we propose a small-sized and noise-reduced power analyzer for IoT devices. We utilize a signal averaging method to reduce a wide frequency range of noises. At that time, how to implement a synchronous process between a power analyzer and a target IoT device becomes the key problem. We solve this problem by (a) using synchronization signals generated by a general-purpose I/O interface of a microprocessor and (b) introducing a data-order correction process. We analyze power/energy consumption of the encryption process of LED block cipher on the IoT device and obtain an average power of 146.3mW and energy of 3.84mJ. The proposed power analyzer is just implemented on a 5cm × 5cm board but these results only have 5% errors compared to a high-precision oscilloscope.

AB - Power analysis for IoT devices is strongly required to reduce power consumption and realize secure communications, where we need a small-sized power analyzer that can reduce a wide frequency range of noises is needed. In this paper, we propose a small-sized and noise-reduced power analyzer for IoT devices. We utilize a signal averaging method to reduce a wide frequency range of noises. At that time, how to implement a synchronous process between a power analyzer and a target IoT device becomes the key problem. We solve this problem by (a) using synchronization signals generated by a general-purpose I/O interface of a microprocessor and (b) introducing a data-order correction process. We analyze power/energy consumption of the encryption process of LED block cipher on the IoT device and obtain an average power of 146.3mW and energy of 3.84mJ. The proposed power analyzer is just implemented on a 5cm × 5cm board but these results only have 5% errors compared to a high-precision oscilloscope.

UR - http://www.scopus.com/inward/record.url?scp=84982261610&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=84982261610&partnerID=8YFLogxK

U2 - 10.1109/ASICON.2015.7516927

DO - 10.1109/ASICON.2015.7516927

M3 - Conference contribution

AN - SCOPUS:84982261610

BT - Proceedings - 2015 IEEE 11th International Conference on ASIC, ASICON 2015

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 11th IEEE International Conference on Advanced Semiconductor Integrated Circuits (ASIC), ASICON 2015

Y2 - 3 November 2015 through 6 November 2015

ER -

Small-sized and noise-reducing power analyzer design for low-power IoT devices

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