Software-cooperative power-efficient heterogeneous multi-core for media processing

Hiroaki Shikano, Masaki Ito, Kunio Uchiyama, Toshihiko Odaka, Akihiro Hayashi, Takeshi Masuura, Masayoshi Mase, Jun Shirako, Yasutaka Wada, Keiji Kimura, Hironori Kasahara

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    7 Citations (Scopus)

    Abstract

    A heterogeneous multi-core processor (HMCP) architecture, which integrates general purpose processors (CPU) and accelerators (ACC) to achieve high-performance as well as low-power consumption with the support of a parallelizing compiler, was developed. The evaluation was performed using an MP3 audio encoder on a simulator that accurately models the HMCP. It showed that 16-frame encoding on the HMCP with four CPUs and four ACCs yielded 24.5-fold speed-up of performance against sequential execution on one CPU. Furthermore, power saving by the compiler reduced energy consumption of the encoding to 0.17 J, namely, by 28.4%.

    Original languageEnglish
    Title of host publicationProceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC
    Pages736-741
    Number of pages6
    DOIs
    Publication statusPublished - 2008
    Event2008 Asia and South Pacific Design Automation Conference, ASP-DAC - Seoul
    Duration: 2008 Mar 212008 Mar 24

    Other

    Other2008 Asia and South Pacific Design Automation Conference, ASP-DAC
    CitySeoul
    Period08/3/2108/3/24

    Fingerprint

    Program processors
    Processing
    Particle accelerators
    Electric power utilization
    Energy utilization
    Simulators

    ASJC Scopus subject areas

    • Engineering(all)

    Cite this

    Shikano, H., Ito, M., Uchiyama, K., Odaka, T., Hayashi, A., Masuura, T., ... Kasahara, H. (2008). Software-cooperative power-efficient heterogeneous multi-core for media processing. In Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC (pp. 736-741). [4484049] https://doi.org/10.1109/ASPDAC.2008.4484049

    Software-cooperative power-efficient heterogeneous multi-core for media processing. / Shikano, Hiroaki; Ito, Masaki; Uchiyama, Kunio; Odaka, Toshihiko; Hayashi, Akihiro; Masuura, Takeshi; Mase, Masayoshi; Shirako, Jun; Wada, Yasutaka; Kimura, Keiji; Kasahara, Hironori.

    Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC. 2008. p. 736-741 4484049.

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    Shikano, H, Ito, M, Uchiyama, K, Odaka, T, Hayashi, A, Masuura, T, Mase, M, Shirako, J, Wada, Y, Kimura, K & Kasahara, H 2008, Software-cooperative power-efficient heterogeneous multi-core for media processing. in Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC., 4484049, pp. 736-741, 2008 Asia and South Pacific Design Automation Conference, ASP-DAC, Seoul, 08/3/21. https://doi.org/10.1109/ASPDAC.2008.4484049
    Shikano H, Ito M, Uchiyama K, Odaka T, Hayashi A, Masuura T et al. Software-cooperative power-efficient heterogeneous multi-core for media processing. In Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC. 2008. p. 736-741. 4484049 https://doi.org/10.1109/ASPDAC.2008.4484049
    Shikano, Hiroaki ; Ito, Masaki ; Uchiyama, Kunio ; Odaka, Toshihiko ; Hayashi, Akihiro ; Masuura, Takeshi ; Mase, Masayoshi ; Shirako, Jun ; Wada, Yasutaka ; Kimura, Keiji ; Kasahara, Hironori. / Software-cooperative power-efficient heterogeneous multi-core for media processing. Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC. 2008. pp. 736-741
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