Software-cooperative power-efficient heterogeneous multi-core for media processing

Hiroaki Shikano; Masaki Ito; Kunio Uchiyama; Toshihiko Odaka; Akihiro Hayashi; Takeshi Masuura; Masayoshi Mase; Jun Shirako; Yasutaka Wada; Keiji Kimura; Hironori Kasahara

doi:10.1109/ASPDAC.2008.4484049

Software-cooperative power-efficient heterogeneous multi-core for media processing

Hiroaki Shikano^*, Masaki Ito, Kunio Uchiyama, Toshihiko Odaka, Akihiro Hayashi, Takeshi Masuura, Masayoshi Mase, Jun Shirako, Yasutaka Wada, Keiji Kimura, Hironori Kasahara

^*Corresponding author for this work

School of Fundamental Science and Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

7 Citations (Scopus)

Abstract

A heterogeneous multi-core processor (HMCP) architecture, which integrates general purpose processors (CPU) and accelerators (ACC) to achieve high-performance as well as low-power consumption with the support of a parallelizing compiler, was developed. The evaluation was performed using an MP3 audio encoder on a simulator that accurately models the HMCP. It showed that 16-frame encoding on the HMCP with four CPUs and four ACCs yielded 24.5-fold speed-up of performance against sequential execution on one CPU. Furthermore, power saving by the compiler reduced energy consumption of the encoding to 0.17 J, namely, by 28.4%.

Original language	English
Title of host publication	2008 Asia and South Pacific Design Automation Conference, ASP-DAC
Pages	736-741
Number of pages	6
DOIs	https://doi.org/10.1109/ASPDAC.2008.4484049
Publication status	Published - 2008 Aug 21
Event	2008 Asia and South Pacific Design Automation Conference, ASP-DAC - Seoul, Korea, Republic of Duration: 2008 Mar 21 → 2008 Mar 24

Publication series

Name	Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC

Conference

Conference	2008 Asia and South Pacific Design Automation Conference, ASP-DAC
Country/Territory	Korea, Republic of
City	Seoul
Period	08/3/21 → 08/3/24

ASJC Scopus subject areas

Computer Science Applications
Computer Graphics and Computer-Aided Design
Electrical and Electronic Engineering

UN SDGs

This output contributes to the following UN Sustainable Development Goals (SDGs)

Access to Document

10.1109/ASPDAC.2008.4484049

Cite this

Shikano, H., Ito, M., Uchiyama, K., Odaka, T., Hayashi, A., Masuura, T., Mase, M., Shirako, J., Wada, Y., Kimura, K., & Kasahara, H. (2008). Software-cooperative power-efficient heterogeneous multi-core for media processing. In 2008 Asia and South Pacific Design Automation Conference, ASP-DAC (pp. 736-741). [4484049] (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC). https://doi.org/10.1109/ASPDAC.2008.4484049

Software-cooperative power-efficient heterogeneous multi-core for media processing. / Shikano, Hiroaki; Ito, Masaki; Uchiyama, Kunio et al.

2008 Asia and South Pacific Design Automation Conference, ASP-DAC. 2008. p. 736-741 4484049 (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Shikano, H, Ito, M, Uchiyama, K, Odaka, T, Hayashi, A, Masuura, T, Mase, M, Shirako, J, Wada, Y, Kimura, K & Kasahara, H 2008, Software-cooperative power-efficient heterogeneous multi-core for media processing. in 2008 Asia and South Pacific Design Automation Conference, ASP-DAC., 4484049, Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC, pp. 736-741, 2008 Asia and South Pacific Design Automation Conference, ASP-DAC, Seoul, Korea, Republic of, 08/3/21. https://doi.org/10.1109/ASPDAC.2008.4484049

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Software-cooperative power-efficient heterogeneous multi-core for media processing

Abstract

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ASJC Scopus subject areas

UN SDGs

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