Abstract
In the paper, we present a real-time speech recognition chip for monosyllables such as A,B,..., etc. The chip recognizes up to 64 monosyllables based on the Hidden Markov Model (HMM), which is a well known speaker-independent recognition method. The chip accepts a short-speech frame including 256 16-bit digitized samples corresponding to 11.6 ms period, and outputs the 6-bit symbol code of monosyllables for 16 short-frames (corresponding to 185.6 ms). A learning circuit to update HMM parameters for the recognition chip has also been designed, and the recognition chip includes an interface to the learning circuit. We have fabricated the recognition chip by the VDEC Rohm 0.6 μm process on a 4.5 mmx4.5 mm chip. We have also made a layout of the entire circuit including the learning circuit by the VDEC Rohm 0.35 μm process on a 4.9 mmx4.9 mm chip.
| Original language | English |
|---|---|
| Title of host publication | Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC |
| Publisher | Institute of Electrical and Electronics Engineers Inc. |
| Pages | 396-399 |
| Number of pages | 4 |
| Volume | 2001-January |
| ISBN (Print) | 0780366336 |
| DOIs | |
| Publication status | Published - 2001 |
| Externally published | Yes |
| Event | Asia and South Pacific Design Automation Conference 2001, ASP-DAC 2001 - Yokohama, Japan Duration: 2001 Jan 30 → 2001 Feb 2 |
Other
| Other | Asia and South Pacific Design Automation Conference 2001, ASP-DAC 2001 |
|---|---|
| Country | Japan |
| City | Yokohama |
| Period | 01/1/30 → 01/2/2 |
Fingerprint
Keywords
- Algorithm design and analysis
- Circuits
- Feature extraction
- Hardware
- Hidden Markov models
- Linear predictive coding
- Speech analysis
- Speech coding
- Speech recognition
- Vectors
ASJC Scopus subject areas
- Electrical and Electronic Engineering
- Computer Science Applications
- Computer Graphics and Computer-Aided Design
Cite this
Speech recognition chip for monosyllables. / Nakamura, K.; Zhu, Qiang; Maruoka, S.; Horiyama, T.; Kimura, Shinji; Watanabe, K.
Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC. Vol. 2001-January Institute of Electrical and Electronics Engineers Inc., 2001. p. 396-399 913339.Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
}
TY - GEN
T1 - Speech recognition chip for monosyllables
AU - Nakamura, K.
AU - Zhu, Qiang
AU - Maruoka, S.
AU - Horiyama, T.
AU - Kimura, Shinji
AU - Watanabe, K.
PY - 2001
Y1 - 2001
N2 - In the paper, we present a real-time speech recognition chip for monosyllables such as A,B,..., etc. The chip recognizes up to 64 monosyllables based on the Hidden Markov Model (HMM), which is a well known speaker-independent recognition method. The chip accepts a short-speech frame including 256 16-bit digitized samples corresponding to 11.6 ms period, and outputs the 6-bit symbol code of monosyllables for 16 short-frames (corresponding to 185.6 ms). A learning circuit to update HMM parameters for the recognition chip has also been designed, and the recognition chip includes an interface to the learning circuit. We have fabricated the recognition chip by the VDEC Rohm 0.6 μm process on a 4.5 mmx4.5 mm chip. We have also made a layout of the entire circuit including the learning circuit by the VDEC Rohm 0.35 μm process on a 4.9 mmx4.9 mm chip.
AB - In the paper, we present a real-time speech recognition chip for monosyllables such as A,B,..., etc. The chip recognizes up to 64 monosyllables based on the Hidden Markov Model (HMM), which is a well known speaker-independent recognition method. The chip accepts a short-speech frame including 256 16-bit digitized samples corresponding to 11.6 ms period, and outputs the 6-bit symbol code of monosyllables for 16 short-frames (corresponding to 185.6 ms). A learning circuit to update HMM parameters for the recognition chip has also been designed, and the recognition chip includes an interface to the learning circuit. We have fabricated the recognition chip by the VDEC Rohm 0.6 μm process on a 4.5 mmx4.5 mm chip. We have also made a layout of the entire circuit including the learning circuit by the VDEC Rohm 0.35 μm process on a 4.9 mmx4.9 mm chip.
KW - Algorithm design and analysis
KW - Circuits
KW - Feature extraction
KW - Hardware
KW - Hidden Markov models
KW - Linear predictive coding
KW - Speech analysis
KW - Speech coding
KW - Speech recognition
KW - Vectors
UR - http://www.scopus.com/inward/record.url?scp=1542568711&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=1542568711&partnerID=8YFLogxK
U2 - 10.1109/ASPDAC.2001.913339
DO - 10.1109/ASPDAC.2001.913339
M3 - Conference contribution
AN - SCOPUS:1542568711
SN - 0780366336
VL - 2001-January
SP - 396
EP - 399
BT - Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC
PB - Institute of Electrical and Electronics Engineers Inc.
ER -