Speeding-up exact and fast FIFO-based cache configuration simulation

    Research output: Contribution to journalArticle

    3 Citations (Scopus)

    Abstract

    The number of sets, block size, and associativity determine processor's cache configurations. Particularly in embedded systems, their cache configuration can be optimized since their target applications are much limited. Recently, the CRCB method has been proposed for LRU-based (Least Recently Used-based) cache configuration simulation, which can calculate cache hit/miss counts accurately and very fast changing the three parameters. However many recent processors use FIFO-based (First-In-First-Out-based) caches instead of LRU-based caches due to the viewpoints of their hardware costs. In this paper, we propose a speeding-up cache configuration simulation method for embedded applications that uses FIFO as a cache replacement policy. We first prove several properties for FIFO-based caches and then propose a simulation method that can process two or more FIFO-based cache configurations with different cache associativities simultaneously. Experimental results show that our proposed method can obtain accurate cache hits/misses and runs up to 32% faster than the conventional simulators.

    Original languageEnglish
    Pages (from-to)1161-1167
    Number of pages7
    JournalIEICE Electronics Express
    Volume8
    Issue number14
    DOIs
    Publication statusPublished - 2011

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    configurations
    Embedded systems
    simulation
    Simulators
    central processing units
    Hardware
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    simulators
    hardware
    costs

    Keywords

    • Cache configuration optimization
    • Cache memory
    • Cache simulation
    • Embedded systems
    • FIFO

    ASJC Scopus subject areas

    • Electronic, Optical and Magnetic Materials
    • Condensed Matter Physics
    • Electrical and Electronic Engineering

    Cite this

    Speeding-up exact and fast FIFO-based cache configuration simulation. / Tawada, Masashi; Yanagisawa, Masao; Togawa, Nozomu.

    In: IEICE Electronics Express, Vol. 8, No. 14, 2011, p. 1161-1167.

    Research output: Contribution to journalArticle

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