State dependent scan flip-flop with key-based configuration against scan-based side channel attack on RSA circuit

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    6 Citations (Scopus)


    Scan test is one of the useful design for testability techniques, which can detect circuit failure efficiently. However, it has been reported that it's possible to retrieve secret keys from cryptographic LSIs through scan chains. Therefore testability and security contradicted to each other, and there is a need to an efficient design for testability circuit so as to satisfy both testability and security requirement. In this paper, a secure scan architecture against scan-based attack is proposed to achieve high security without compromising the testability. In our method, scan structure is dynamically changed by adding the latch to any FFs in the scan chain. We made an analysis on an RSA circuit implementation to show the effectiveness of the proposed method and discussed how our approach is resistant to scan-based attack.

    Original languageEnglish
    Title of host publicationIEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS
    Number of pages4
    Publication statusPublished - 2012
    Event2012 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2012 - Kaohsiung
    Duration: 2012 Dec 22012 Dec 5


    Other2012 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2012



    • RSA
    • scan chain
    • scan-based attack
    • secure scan architecture

    ASJC Scopus subject areas

    • Electrical and Electronic Engineering

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