Study of self-aligned doped channel MOSFET structure for low power and low 1/f noise operation

Takashi Yoshitomi, Hideki Kimijima, Shinnichiro Ishizuka, Yasunori Miyahara, Tatsuya Ohguro, Eiji Morifuji, Toyota Morimoto, Hisayo Sasaki Momose, Yasuhiro Katsumata, Hiroshi Iwai

Research output: Contribution to journalArticlepeer-review

5 Citations (Scopus)

Abstract

A self-Aligned Doped Channel (SADC) is proposed and investigated for the first time. In the SADC process, the channel doping process is carried out by using solid phase diffusion from the gate; hence the doping region is fully self-aligned to the gate, and the junction capacitance can be reduced. In addition, the implantation damage in the channel is reduced. We obtained 0.25 μm gate length nMOSFETs with low noise and low power consumption by using the SADC structure. Hence, this structure is attractive for small geometry RF CMOS devices.

Original languageEnglish
Pages (from-to)1219-1224
Number of pages6
JournalSolid-State Electronics
Volume43
Issue number7
DOIs
Publication statusPublished - 1999 Jul
Externally publishedYes

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Condensed Matter Physics
  • Electrical and Electronic Engineering
  • Materials Chemistry

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