Suppression of boron penetration from source/drain-extension to improve gate leakage characteristics and gate-oxide reliability for 65-nm node CMOS and beyond

Takashi Hayashi, Tomohiro Yamashita, Katsuya Shiga, Kiyoshi Hayashi, Hidekazu Oda, Takahisa Eimori, Masahide Inuishi, Yuzuru Ohji

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Engineering & Materials Science

Physics & Astronomy