Systematic selection of CRC generator polynomials to detect double bit errors in Ethernet networks

Behrouz Zolfaghari*, Hamed Sheidaeian, Saadat Pour Mozafari

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

CRC (Cyclic Redundancy Check) is used as an error detection code in Ethernet frames. This method attaches the residue of a modulo-2 division to the message in the sender side and recalculates the residue in the receiver side. The agreed-upon divisor is called the generator. The range of detectable errors in this method is determined by the properties of the generator. In this paper a systematic approach is proposed to identify all proper generators which can be used in Ethernet networks in order to detect double bit errors which invert a pair of bits in the message.

Original languageEnglish
Title of host publicationRecent Trends in Wireless and Mobile Networks - Third International Conferences WiMo 2011 and CoNeCo 2011, Proceedings
Pages228-235
Number of pages8
DOIs
Publication statusPublished - 2011
Externally publishedYes
Event3rd International Conference on Wireless, Mobile Networks, WiMo 2011 and the 3rd International Conference on Computer Networks and Communications, CoNeCo - 2011 - Ankara, Turkey
Duration: 2011 Jun 262011 Jun 28

Publication series

NameCommunications in Computer and Information Science
Volume162 CCIS
ISSN (Print)1865-0929

Conference

Conference3rd International Conference on Wireless, Mobile Networks, WiMo 2011 and the 3rd International Conference on Computer Networks and Communications, CoNeCo - 2011
Country/TerritoryTurkey
CityAnkara
Period11/6/2611/6/28

Keywords

  • double bit errors
  • generator polynomials
  • OZO polynomials

ASJC Scopus subject areas

  • Computer Science(all)
  • Mathematics(all)

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