Thermal and Wirelength Optimization with TSV Assignment for 3-D-IC

Yi Zhao, Cong Hao, Takeshi Yoshimura

Research output: Contribution to journalArticle

Abstract

3-D-IC is an emerging technology that overcomes the drawbacks of 2-D-IC and a vital structure called through-silicon via (TSV) is used to connect the adjacent layers vertically. In this paper, based on graph theories, we formulate the TSV assignment as an integer multicommodity min-cost (IMCMC) problem, and using multilevel algorithm, we get optimal solution. During the assignment, the capacity of the grid could be insufficient to contain the flows so that conditional grid extension effectively relieves the capacity limits and accelerate running speed. Thermal resistive model is introduced to simulate the heat dissipation of chip and estimate temperature distribution each layer. By inserting the thermal TSV, the temperature of superheated region is reduced. Moreover, considering about a more complicated situation, we propose a method to assign multipins in a net. The experimental results demonstrate our model in the IMCMC network using multilevel algorithm achieve optimized congestion, less wirelength, higher running speed, and reduced temperature.

Original languageEnglish
Article number8523818
Pages (from-to)625-632
Number of pages8
JournalIEEE Transactions on Electron Devices
Volume66
Issue number1
DOIs
Publication statusPublished - 2019 Jan 1

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Silicon
Graph theory
Heat losses
Costs
Temperature distribution
Temperature
Hot Temperature

Keywords

  • 3-D-IC
  • thermal through silicon-via (TSV)
  • TSV assignment

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

Cite this

Thermal and Wirelength Optimization with TSV Assignment for 3-D-IC. / Zhao, Yi; Hao, Cong; Yoshimura, Takeshi.

In: IEEE Transactions on Electron Devices, Vol. 66, No. 1, 8523818, 01.01.2019, p. 625-632.

Research output: Contribution to journalArticle

Zhao, Yi ; Hao, Cong ; Yoshimura, Takeshi. / Thermal and Wirelength Optimization with TSV Assignment for 3-D-IC. In: IEEE Transactions on Electron Devices. 2019 ; Vol. 66, No. 1. pp. 625-632.
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