THREE DIMENSIONAL LEAKAGE CURRENT IN CORRUGATED CAPACITOR CELLS.

Eiji Takeda, Kan Takeuchi, Atsushi Hiraiwa, Toru Toyabe, Hideo Sunami, Kiyoo Itoh

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

The mechanism of three-dimensional leakage current in a corrugated capacitor cell for megabit DRAMs has been clarified both experimentally and theoretically using a 3-D device simulator (CADDETH). This study shows that this current is almost completely defined by using the minimum value of the potential barrier height between cells. This is the case even if there is a complicated potential form due to three-dimensional effects and/or sophisticated device structures. Furthermore, the three-dimensional effects in the leakage current caused by back bias penetration are discussed in detail. On the basis of these results, significant guidelines are proposed for trench capacitor cells.

Original languageEnglish
Title of host publicationConference on Solid State Devices and Materials
Place of PublicationTokyo, Jpn
PublisherJapan Soc of Applied Physics
Pages37-40
Number of pages4
ISBN (Print)4930813107
Publication statusPublished - 1985
Externally publishedYes

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ASJC Scopus subject areas

  • Engineering(all)

Cite this

Takeda, E., Takeuchi, K., Hiraiwa, A., Toyabe, T., Sunami, H., & Itoh, K. (1985). THREE DIMENSIONAL LEAKAGE CURRENT IN CORRUGATED CAPACITOR CELLS. In Conference on Solid State Devices and Materials (pp. 37-40). Japan Soc of Applied Physics.