TY - GEN
T1 - Topology-Optimization-based conductor pattern design for inductance cancellation structure to reduce common- and differential-mode noise
AU - Nomura, Katsuya
AU - Takahashi, Atsuhiro
AU - Kojima, Takashi
AU - Yamasaki, Shintaro
AU - Yaji, Kentaro
AU - Bo, Hiroki
AU - Fujita, Kikuo
N1 - Publisher Copyright:
© 2019 IEEE.
PY - 2019/5/24
Y1 - 2019/5/24
N2 - Topology optimization, a simulation-based optimization technique to mathematically derive an optimal structure, is applied to the conductor design of an inductance cancellation structure to reduce common-and differential-mode noise. The design of an appropriate conductor pattern for an inductance cancellation structure is difficult due to the unintentional magnetic couplings between the multiple loops mounted to cancel the parasitic inductances of X and Y capacitors. In topology optimization, this design problem is formulated as an optimization problem and an optimal structure is obtained by repeated modification of the conductor pattern using mathematical programming. The performance of circuit boards before and after optimization is evaluated using mixed-mode s-parameters. Both simulation and experimental measurement verify that the effect of inductance cancellation is improved by this optimization.
AB - Topology optimization, a simulation-based optimization technique to mathematically derive an optimal structure, is applied to the conductor design of an inductance cancellation structure to reduce common-and differential-mode noise. The design of an appropriate conductor pattern for an inductance cancellation structure is difficult due to the unintentional magnetic couplings between the multiple loops mounted to cancel the parasitic inductances of X and Y capacitors. In topology optimization, this design problem is formulated as an optimization problem and an optimal structure is obtained by repeated modification of the conductor pattern using mathematical programming. The performance of circuit boards before and after optimization is evaluated using mixed-mode s-parameters. Both simulation and experimental measurement verify that the effect of inductance cancellation is improved by this optimization.
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U2 - 10.1109/APEC.2019.8722107
DO - 10.1109/APEC.2019.8722107
M3 - Conference contribution
AN - SCOPUS:85067103845
T3 - Conference Proceedings - IEEE Applied Power Electronics Conference and Exposition - APEC
SP - 2900
EP - 2905
BT - 34th Annual IEEE Applied Power Electronics Conference and Exposition, APEC 2019
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 34th Annual IEEE Applied Power Electronics Conference and Exposition, APEC 2019
Y2 - 17 March 2019 through 21 March 2019
ER -