TSV Assignment of Thermal and Wirelength Optimization for 3D-IC Routing

Yi Zhao, Cong Hao, Takeshi Yoshimura

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

Abstract

The 3D integrated circuit is a complex structure composed of chips in multi-layers fabricated vertically and horizontally. Signal through-silicon-via (TSV) is vertical electric connection enabling to communicate and compact the functional bulk. And thermal TSV is effective to amplify the heat dissipation and reduce temperature by establishing the heat dissipation path. In this work we introduce conditional grid extension method to Integrated Multi-Commodity Min-Cost (IMCMC) problem to relieve capacity limit. Moreover, we propose thermal increase model to simulate thermal distribution and realize temperature reduction. Compared with previous work, several routing revision is adopted to make the result more accurate and reduce wire capacitance. The experimental results show the effectiveness of our algorithm on reducing temperature and optimizing congestion.

Original languageEnglish
Title of host publication2018 IEEE 28th International Symposium on Power and Timing Modeling, Optimization and Simulation, PATMOS 2018
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages155-162
Number of pages8
ISBN (Print)9781538663653
DOIs
Publication statusPublished - 2018 Sep 12
Event28th IEEE International Symposium on Power and Timing Modeling, Optimization and Simulation, PATMOS 2018 - Platja d'Aro, Spain
Duration: 2018 Jul 22018 Jul 4

Other

Other28th IEEE International Symposium on Power and Timing Modeling, Optimization and Simulation, PATMOS 2018
CountrySpain
CityPlatja d'Aro
Period18/7/218/7/4

Keywords

  • 3D-IC
  • thermal TSV
  • TSV assignment

ASJC Scopus subject areas

  • Control and Optimization
  • Energy Engineering and Power Technology
  • Electrical and Electronic Engineering
  • Modelling and Simulation

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  • Cite this

    Zhao, Y., Hao, C., & Yoshimura, T. (2018). TSV Assignment of Thermal and Wirelength Optimization for 3D-IC Routing. In 2018 IEEE 28th International Symposium on Power and Timing Modeling, Optimization and Simulation, PATMOS 2018 (pp. 155-162). [8464161] Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/PATMOS.2018.8464161