Ultralow-voltage operation of Silicon-on-Thin-BOX (SOTB) 2Mbit SRAM down to 0.37 v utilizing adaptive back bias

Y. Yamamoto, H. Makiyama, H. Shinohara, T. Iwamatsu, H. Oda, S. Kamohara, N. Sugii, Y. Yamaguchi, T. Mizutani, T. Hiramoto

Research output: Chapter in Book/Report/Conference proceedingConference contribution

50 Citations (Scopus)

Abstract

We demonstrated record 0.37V minimum operation voltage (Vmin) of 2Mb Silicon-on-Thin-Buried-oxide (SOTB) 6T-SRAM. Thanks to the small variability of SOTB (AVT∼1.3 mVμm) and adaptive back biasing (ABB), Vmin was lowered down to ∼0.4 V regardless of temperature. Both fast access time and small standby leakage were achieved by ABB.

Original languageEnglish
Title of host publication2013 Symposium on VLSI Technology, VLSIT 2013 - Digest of Technical Papers
PagesT212-T213
Publication statusPublished - 2013
Externally publishedYes
Event2013 Symposium on VLSI Technology, VLSIT 2013 - Kyoto, Japan
Duration: 2013 Jun 112013 Jun 13

Publication series

NameDigest of Technical Papers - Symposium on VLSI Technology
ISSN (Print)0743-1562

Other

Other2013 Symposium on VLSI Technology, VLSIT 2013
Country/TerritoryJapan
CityKyoto
Period13/6/1113/6/13

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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