User-friendly compact model of magnetic tunnel junctions for circuit simulation based on switching probability

Haoyan Liu, Takashi Ohsawa

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

We propose a new compact MTJ model for circuit simulation which is implemented by Verilog-A and can be easily built in de-facto standard SPICE. The model is based on switching probability of an MTJ with time-varying input current. The transition between the adiabatic precessional model and the thermal activation model is made smooth by using an interpolation function with a technique to predict a switching time from an input current. Simulation results validate that the model is consistent with physical model and effective for MTJ/CMOS hybrid circuit simulation.

Original languageEnglish
Title of host publication2019 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2019
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781728106557
DOIs
Publication statusPublished - 2019 Apr 1
Event2019 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2019 - Hsinchu, Taiwan, Province of China
Duration: 2019 Apr 222019 Apr 25

Publication series

Name2019 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2019

Conference

Conference2019 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2019
CountryTaiwan, Province of China
CityHsinchu
Period19/4/2219/4/25

Fingerprint

Tunnel junctions
Circuit simulation
tunnel junctions
simulation
hybrid circuits
Computer hardware description languages
SPICE
interpolation
CMOS
Interpolation
Chemical activation
activation

Keywords

  • Compact model
  • Magnetic tunnel junction (MTJ)
  • Spin transfer torque magnetic random access memory (STT-MRAM)
  • Verilog-A

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Safety, Risk, Reliability and Quality
  • Instrumentation
  • Computer Networks and Communications
  • Hardware and Architecture

Cite this

Liu, H., & Ohsawa, T. (2019). User-friendly compact model of magnetic tunnel junctions for circuit simulation based on switching probability. In 2019 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2019 [8741646] (2019 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2019). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/VLSI-DAT.2019.8741646

User-friendly compact model of magnetic tunnel junctions for circuit simulation based on switching probability. / Liu, Haoyan; Ohsawa, Takashi.

2019 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2019. Institute of Electrical and Electronics Engineers Inc., 2019. 8741646 (2019 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2019).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Liu, H & Ohsawa, T 2019, User-friendly compact model of magnetic tunnel junctions for circuit simulation based on switching probability. in 2019 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2019., 8741646, 2019 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2019, Institute of Electrical and Electronics Engineers Inc., 2019 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2019, Hsinchu, Taiwan, Province of China, 19/4/22. https://doi.org/10.1109/VLSI-DAT.2019.8741646
Liu H, Ohsawa T. User-friendly compact model of magnetic tunnel junctions for circuit simulation based on switching probability. In 2019 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2019. Institute of Electrical and Electronics Engineers Inc. 2019. 8741646. (2019 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2019). https://doi.org/10.1109/VLSI-DAT.2019.8741646
Liu, Haoyan ; Ohsawa, Takashi. / User-friendly compact model of magnetic tunnel junctions for circuit simulation based on switching probability. 2019 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2019. Institute of Electrical and Electronics Engineers Inc., 2019. (2019 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2019).
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