Vector labelling method in fixed points algorithm and array processors

Shin'Ichi Oishi, Tadaaki Takase, Kiyotaka Yamamura

Research output: Contribution to journalArticle

Abstract

Studies of fixed point algorithms have advanced greatly in the last decade. These algorithms have been developed to construct globally fixed points of finite‐dimensional continuous maps, to which existence of fixed points is guaranteed by, for instance, Brouwer's fixed point theorem. However, it is pointed out that these algorithms become progressively slower with increasing dimension. In this paper it is shown that the vector labelling algorithm, one of the typical fixed point algorithms, can be performed efficiently in parallel on a suitable array processor system. Under certain conditions, the time complexity of the vector labelling algorithm is determined by pivot operations. It is shown that high parallel efficiency about 0.9 is attained by executing these pivot operations on our array processor. to further speed up the algorithm, a method is also shown for evading matrix inversion formerly needed at the beginning of the vector labelling algorithm.

Original languageEnglish
Pages (from-to)51-59
Number of pages9
JournalElectronics and Communications in Japan (Part I: Communications)
Volume66
Issue number11
DOIs
Publication statusPublished - 1983

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ASJC Scopus subject areas

  • Computer Networks and Communications
  • Electrical and Electronic Engineering

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