VLSI implementation of a fast intra prediction algorithm for H.264/AVC encoding

Youhua Shi, Kenta Tokumitsu, Nozomu Togawa, Masao Yanagisawa, Tatsuo Ohtsuki

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    1 Citation (Scopus)

    Abstract

    Intra-frame coding is one of the most important technologies in H.264/AVC, which made significant contributions to the enhancement of coding efficiency of H.264/AVC at the cost of computation complexity. To address this problem, in this paper we present an efficient VLSI implementation of a computation efficient intra prediction algorithm for H.264/AVC encoding. Unlike most of existing fast intra-mode selection techniques, in the proposed method the directional differences are computed using a few selected original pixels to obtain the candidate modes with the minimal direction cost. The proposed method is hardware-friendly and provides more processing parallelism for H.264 intra-frame encoding with less overhead and less power consumption, which is expected to be utilized as a favourable accelerator hardware module in a real-time HDTV (1920×1080p) H.264 encoder.

    Original languageEnglish
    Title of host publicationIEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS
    Pages1139-1142
    Number of pages4
    DOIs
    Publication statusPublished - 2010
    Event2010 Asia Pacific Conference on Circuit and System, APCCAS 2010 - Kuala Lumpur
    Duration: 2010 Dec 62010 Dec 9

    Other

    Other2010 Asia Pacific Conference on Circuit and System, APCCAS 2010
    CityKuala Lumpur
    Period10/12/610/12/9

    Fingerprint

    Hardware
    High definition television
    Particle accelerators
    Electric power utilization
    Pixels
    Processing
    Costs

    Keywords

    • computation efficient
    • H.264 encoding
    • hardware implementation
    • Intra prediction

    ASJC Scopus subject areas

    • Electrical and Electronic Engineering

    Cite this

    Shi, Y., Tokumitsu, K., Togawa, N., Yanagisawa, M., & Ohtsuki, T. (2010). VLSI implementation of a fast intra prediction algorithm for H.264/AVC encoding. In IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS (pp. 1139-1142). [5774925] https://doi.org/10.1109/APCCAS.2010.5774925

    VLSI implementation of a fast intra prediction algorithm for H.264/AVC encoding. / Shi, Youhua; Tokumitsu, Kenta; Togawa, Nozomu; Yanagisawa, Masao; Ohtsuki, Tatsuo.

    IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS. 2010. p. 1139-1142 5774925.

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    Shi, Y, Tokumitsu, K, Togawa, N, Yanagisawa, M & Ohtsuki, T 2010, VLSI implementation of a fast intra prediction algorithm for H.264/AVC encoding. in IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS., 5774925, pp. 1139-1142, 2010 Asia Pacific Conference on Circuit and System, APCCAS 2010, Kuala Lumpur, 10/12/6. https://doi.org/10.1109/APCCAS.2010.5774925
    Shi Y, Tokumitsu K, Togawa N, Yanagisawa M, Ohtsuki T. VLSI implementation of a fast intra prediction algorithm for H.264/AVC encoding. In IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS. 2010. p. 1139-1142. 5774925 https://doi.org/10.1109/APCCAS.2010.5774925
    Shi, Youhua ; Tokumitsu, Kenta ; Togawa, Nozomu ; Yanagisawa, Masao ; Ohtsuki, Tatsuo. / VLSI implementation of a fast intra prediction algorithm for H.264/AVC encoding. IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS. 2010. pp. 1139-1142
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