VLSI implementation of a fast intra prediction algorithm for H.264/AVC encoding

Youhua Shi; Kenta Tokumitsu; Nozomu Togawa; Masao Yanagisawa; Tatsuo Ohtsuki

doi:10.1109/APCCAS.2010.5774925

VLSI implementation of a fast intra prediction algorithm for H.264/AVC encoding

Youhua Shi^*, Kenta Tokumitsu, Nozomu Togawa, Masao Yanagisawa, Tatsuo Ohtsuki

^*Corresponding author for this work

School of Fundamental Science and Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

2 Citations (Scopus)

Abstract

Intra-frame coding is one of the most important technologies in H.264/AVC, which made significant contributions to the enhancement of coding efficiency of H.264/AVC at the cost of computation complexity. To address this problem, in this paper we present an efficient VLSI implementation of a computation efficient intra prediction algorithm for H.264/AVC encoding. Unlike most of existing fast intra-mode selection techniques, in the proposed method the directional differences are computed using a few selected original pixels to obtain the candidate modes with the minimal direction cost. The proposed method is hardware-friendly and provides more processing parallelism for H.264 intra-frame encoding with less overhead and less power consumption, which is expected to be utilized as a favourable accelerator hardware module in a real-time HDTV (1920×1080p) H.264 encoder.

Original language	English
Title of host publication	Proceedings of the 2010 Asia Pacific Conference on Circuit and System, APCCAS 2010
Pages	1139-1142
Number of pages	4
DOIs	https://doi.org/10.1109/APCCAS.2010.5774925
Publication status	Published - 2010 Dec 1
Event	2010 Asia Pacific Conference on Circuit and System, APCCAS 2010 - Kuala Lumpur, Malaysia Duration: 2010 Dec 6 → 2010 Dec 9

Publication series

Name	IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS

Conference

Conference	2010 Asia Pacific Conference on Circuit and System, APCCAS 2010
Country/Territory	Malaysia
City	Kuala Lumpur
Period	10/12/6 → 10/12/9

Keywords

H.264 encoding
Intra prediction
computation efficient
hardware implementation

ASJC Scopus subject areas

Electrical and Electronic Engineering

Access to Document

10.1109/APCCAS.2010.5774925

Cite this

Shi, Y., Tokumitsu, K., Togawa, N., Yanagisawa, M., & Ohtsuki, T. (2010). VLSI implementation of a fast intra prediction algorithm for H.264/AVC encoding. In Proceedings of the 2010 Asia Pacific Conference on Circuit and System, APCCAS 2010 (pp. 1139-1142). [5774925] (IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS). https://doi.org/10.1109/APCCAS.2010.5774925

VLSI implementation of a fast intra prediction algorithm for H.264/AVC encoding. / Shi, Youhua; Tokumitsu, Kenta; Togawa, Nozomu et al.

Proceedings of the 2010 Asia Pacific Conference on Circuit and System, APCCAS 2010. 2010. p. 1139-1142 5774925 (IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Shi, Y, Tokumitsu, K, Togawa, N , Yanagisawa, M & Ohtsuki, T 2010, VLSI implementation of a fast intra prediction algorithm for H.264/AVC encoding. in Proceedings of the 2010 Asia Pacific Conference on Circuit and System, APCCAS 2010., 5774925, IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS, pp. 1139-1142, 2010 Asia Pacific Conference on Circuit and System, APCCAS 2010, Kuala Lumpur, Malaysia, 10/12/6. https://doi.org/10.1109/APCCAS.2010.5774925

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abstract = "Intra-frame coding is one of the most important technologies in H.264/AVC, which made significant contributions to the enhancement of coding efficiency of H.264/AVC at the cost of computation complexity. To address this problem, in this paper we present an efficient VLSI implementation of a computation efficient intra prediction algorithm for H.264/AVC encoding. Unlike most of existing fast intra-mode selection techniques, in the proposed method the directional differences are computed using a few selected original pixels to obtain the candidate modes with the minimal direction cost. The proposed method is hardware-friendly and provides more processing parallelism for H.264 intra-frame encoding with less overhead and less power consumption, which is expected to be utilized as a favourable accelerator hardware module in a real-time HDTV (1920×1080p) H.264 encoder.",

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AU - Ohtsuki, Tatsuo

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AB - Intra-frame coding is one of the most important technologies in H.264/AVC, which made significant contributions to the enhancement of coding efficiency of H.264/AVC at the cost of computation complexity. To address this problem, in this paper we present an efficient VLSI implementation of a computation efficient intra prediction algorithm for H.264/AVC encoding. Unlike most of existing fast intra-mode selection techniques, in the proposed method the directional differences are computed using a few selected original pixels to obtain the candidate modes with the minimal direction cost. The proposed method is hardware-friendly and provides more processing parallelism for H.264 intra-frame encoding with less overhead and less power consumption, which is expected to be utilized as a favourable accelerator hardware module in a real-time HDTV (1920×1080p) H.264 encoder.

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VLSI implementation of a fast intra prediction algorithm for H.264/AVC encoding

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