Abstract
Power optimization has become a significant issue when the CMOS technology entered the nanometer era. Multiple-Supply Voltage (MSV) is a popular and effective method for power reduction. Level shifters may cause area and Interconnect Length Overhead(ILO), and should be considered during floorplanning and post-floorplanning stages. In this paper, we propose a two phases framework VLSAF to solve voltage and level shifter assignment problem. At floorplanning phase, we use: a convex cost network flow algorithm to assign voltage; a minimum cost flow algorithm to assign level shifter. At post-floorplanning phase, a heuristic method is adopted to redistribute white spaces and calculate the positions and shapes of level shifters. Experimental results show VLSAF is effective.
Original language | English |
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Title of host publication | Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI |
Pages | 51-56 |
Number of pages | 6 |
DOIs | |
Publication status | Published - 2009 |
Event | 19th ACM Great Lakes Symposium on VLSI, GLSVLSI '09 - Boston, MA Duration: 2009 May 10 → 2009 May 12 |
Other
Other | 19th ACM Great Lakes Symposium on VLSI, GLSVLSI '09 |
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City | Boston, MA |
Period | 09/5/10 → 09/5/12 |
Keywords
- Convex Network Flow
- Level Shifter Assignment
- Voltage Assignment
- Voltage-Island
- White Space Redistribution
ASJC Scopus subject areas
- Engineering(all)