Worst-case analysis to obtain stable read/write DC margin of high density 6T-SRAM-array with local Vth variability

Yasumasa Tsukamoto, Koji Nii, Susumu Imaoka, Yuji Oda, Shigeki Ohbayashi, Tomoaki Yoshizawa, Hiroshi Makino, Koichiro Ishibashi, Hirofumi Shinohara

Research output: Chapter in Book/Report/Conference proceedingConference contribution

43 Citations (Scopus)

Abstract

6T-SRAM cells in the sub-100 nm CMOS generation are now being exposed to a fatal risk that originates from large local Vth variability (σ V_Local). To achieve high-yield SRAM arrays in presence of random σ V_Local component, we propose worst-case analysis that determines the boundary of the stable Vth region for the SRAM read/write DC margin (Vth curve). Applying this to our original 65 nm SPICE model, we demonstrate typical behavior of the Vth curve and show new criteria for discussing SRAM array stability with Vth variability.

Original languageEnglish
Title of host publicationIEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD
Pages398-405
Number of pages8
Volume2005
DOIs
Publication statusPublished - 2005
Externally publishedYes
EventICCAD-2005: IEEE/ACM International Conference on Computer-Aided Design, 2005 - San Jose, CA, United States
Duration: 2005 Nov 62005 Nov 10

Other

OtherICCAD-2005: IEEE/ACM International Conference on Computer-Aided Design, 2005
CountryUnited States
CitySan Jose, CA
Period05/11/605/11/10

Fingerprint

Static random access storage
SPICE

Keywords

  • Design form manufacturability (DFM)
  • Local Vth variability
  • SRAM
  • Static noise margin

ASJC Scopus subject areas

  • Engineering(all)

Cite this

Tsukamoto, Y., Nii, K., Imaoka, S., Oda, Y., Ohbayashi, S., Yoshizawa, T., ... Shinohara, H. (2005). Worst-case analysis to obtain stable read/write DC margin of high density 6T-SRAM-array with local Vth variability. In IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD (Vol. 2005, pp. 398-405). [1560101] https://doi.org/10.1109/ICCAD.2005.1560101

Worst-case analysis to obtain stable read/write DC margin of high density 6T-SRAM-array with local Vth variability. / Tsukamoto, Yasumasa; Nii, Koji; Imaoka, Susumu; Oda, Yuji; Ohbayashi, Shigeki; Yoshizawa, Tomoaki; Makino, Hiroshi; Ishibashi, Koichiro; Shinohara, Hirofumi.

IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD. Vol. 2005 2005. p. 398-405 1560101.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Tsukamoto, Y, Nii, K, Imaoka, S, Oda, Y, Ohbayashi, S, Yoshizawa, T, Makino, H, Ishibashi, K & Shinohara, H 2005, Worst-case analysis to obtain stable read/write DC margin of high density 6T-SRAM-array with local Vth variability. in IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD. vol. 2005, 1560101, pp. 398-405, ICCAD-2005: IEEE/ACM International Conference on Computer-Aided Design, 2005, San Jose, CA, United States, 05/11/6. https://doi.org/10.1109/ICCAD.2005.1560101
Tsukamoto Y, Nii K, Imaoka S, Oda Y, Ohbayashi S, Yoshizawa T et al. Worst-case analysis to obtain stable read/write DC margin of high density 6T-SRAM-array with local Vth variability. In IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD. Vol. 2005. 2005. p. 398-405. 1560101 https://doi.org/10.1109/ICCAD.2005.1560101
Tsukamoto, Yasumasa ; Nii, Koji ; Imaoka, Susumu ; Oda, Yuji ; Ohbayashi, Shigeki ; Yoshizawa, Tomoaki ; Makino, Hiroshi ; Ishibashi, Koichiro ; Shinohara, Hirofumi. / Worst-case analysis to obtain stable read/write DC margin of high density 6T-SRAM-array with local Vth variability. IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD. Vol. 2005 2005. pp. 398-405
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