### Abstract

Nonvolatile flip-flop enables leakage power reduction in logic circuits and quick return from standby mode. However, it has limited write endurance, and its power consumption for writing is larger than that of conventional D flip-flop (DFF). For this reason, it is important to reduce the number of write operations. The write operations can be reduced by stopping the clock signal to synchronous flip-flops because write operations are executed only when the clock is applied to the flip-flops. In such clock gating, a method using Exclusive OR (XOR) of the current value and the new value as the control signal is well known. The XOR based method is effective, but there are several cases where the write operations can be reduced even if the current value and the new value are different. The paper proposes a method to detect such unnecessary write operations based on state transition analysis, and proposes a write control method to save power consumption of nonvolatile flip-flops. In the method, redundant bits are detected to reduce the number of write operations. If the next state and the outputs do not depend on some current bit, the bit is redundant and not necessary to write. The method is based on Binary Decision Diagram (BDD) calculation. We construct write control circuits to stop the clock signal by converting BDDs representing a set of states where write operations are unnecessary. Proposed method can be combined with the XOR based method and reduce the total write operations. We apply combined method to some benchmark circuits and estimate the power consumption with Synopsys NanoSim. On average, 15.0% power consumption can be reduced compared with only the XOR based method.

Original language | English |
---|---|

Pages (from-to) | 1264-1272 |

Number of pages | 9 |

Journal | IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences |

Volume | E96-A |

Issue number | 6 |

DOIs | |

Publication status | Published - 2013 Jun |

### Fingerprint

### Keywords

- Clock gating
- Nonvolatile flip-flop
- State transition analysis
- Write control method

### ASJC Scopus subject areas

- Electrical and Electronic Engineering
- Computer Graphics and Computer-Aided Design
- Applied Mathematics
- Signal Processing

### Cite this

*IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences*,

*E96-A*(6), 1264-1272. https://doi.org/10.1587/transfun.E96.A.1264

**Write control method for nonvolatile flip-flops based on state transition analysis.** / Okada, Naoya; Nakamura, Yuichi; Kimura, Shinji.

Research output: Contribution to journal › Article

*IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences*, vol. E96-A, no. 6, pp. 1264-1272. https://doi.org/10.1587/transfun.E96.A.1264

}

TY - JOUR

T1 - Write control method for nonvolatile flip-flops based on state transition analysis

AU - Okada, Naoya

AU - Nakamura, Yuichi

AU - Kimura, Shinji

PY - 2013/6

Y1 - 2013/6

N2 - Nonvolatile flip-flop enables leakage power reduction in logic circuits and quick return from standby mode. However, it has limited write endurance, and its power consumption for writing is larger than that of conventional D flip-flop (DFF). For this reason, it is important to reduce the number of write operations. The write operations can be reduced by stopping the clock signal to synchronous flip-flops because write operations are executed only when the clock is applied to the flip-flops. In such clock gating, a method using Exclusive OR (XOR) of the current value and the new value as the control signal is well known. The XOR based method is effective, but there are several cases where the write operations can be reduced even if the current value and the new value are different. The paper proposes a method to detect such unnecessary write operations based on state transition analysis, and proposes a write control method to save power consumption of nonvolatile flip-flops. In the method, redundant bits are detected to reduce the number of write operations. If the next state and the outputs do not depend on some current bit, the bit is redundant and not necessary to write. The method is based on Binary Decision Diagram (BDD) calculation. We construct write control circuits to stop the clock signal by converting BDDs representing a set of states where write operations are unnecessary. Proposed method can be combined with the XOR based method and reduce the total write operations. We apply combined method to some benchmark circuits and estimate the power consumption with Synopsys NanoSim. On average, 15.0% power consumption can be reduced compared with only the XOR based method.

AB - Nonvolatile flip-flop enables leakage power reduction in logic circuits and quick return from standby mode. However, it has limited write endurance, and its power consumption for writing is larger than that of conventional D flip-flop (DFF). For this reason, it is important to reduce the number of write operations. The write operations can be reduced by stopping the clock signal to synchronous flip-flops because write operations are executed only when the clock is applied to the flip-flops. In such clock gating, a method using Exclusive OR (XOR) of the current value and the new value as the control signal is well known. The XOR based method is effective, but there are several cases where the write operations can be reduced even if the current value and the new value are different. The paper proposes a method to detect such unnecessary write operations based on state transition analysis, and proposes a write control method to save power consumption of nonvolatile flip-flops. In the method, redundant bits are detected to reduce the number of write operations. If the next state and the outputs do not depend on some current bit, the bit is redundant and not necessary to write. The method is based on Binary Decision Diagram (BDD) calculation. We construct write control circuits to stop the clock signal by converting BDDs representing a set of states where write operations are unnecessary. Proposed method can be combined with the XOR based method and reduce the total write operations. We apply combined method to some benchmark circuits and estimate the power consumption with Synopsys NanoSim. On average, 15.0% power consumption can be reduced compared with only the XOR based method.

KW - Clock gating

KW - Nonvolatile flip-flop

KW - State transition analysis

KW - Write control method

UR - http://www.scopus.com/inward/record.url?scp=84878576705&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=84878576705&partnerID=8YFLogxK

U2 - 10.1587/transfun.E96.A.1264

DO - 10.1587/transfun.E96.A.1264

M3 - Article

AN - SCOPUS:84878576705

VL - E96-A

SP - 1264

EP - 1272

JO - IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences

JF - IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences

SN - 0916-8508

IS - 6

ER -