年単位の研究成果
Fingerprint Hirofumi Shinoharaが取り組む研究トピックをご確認ください。これらのトピックラベルは、この人物の研究に基づいています。これらを共に使用することで、固有の認識が可能になります。
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Static random access storage
Engineering & Materials Science
Random access storage
Engineering & Materials Science
Networks (circuits)
Engineering & Materials Science
Electric potential
Engineering & Materials Science
Transistors
Engineering & Materials Science
Data storage equipment
Engineering & Materials Science
Flip flop circuits
Engineering & Materials Science
Silicon
Engineering & Materials Science
ネットワーク
最近の共同研究。丸をクリックして詳細を確認しましょう。
研究成果 1982 2019
A CMOS 0.85-V 15.8-nW current and voltage reference without resistors
Wang, J. & Shinohara, H., 2019 4, 2019 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2019. Institute of Electrical and Electronics Engineers Inc., 8741737. (2019 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2019).研究成果: Conference contribution
resistors
Resistors
CMOS
Electric potential
electric potential
A 373 F 2 2D Power-Gated EE SRAM Physically Unclonable Function with Dark-Bit Detection Technique
Liu, K., Min, Y., Yang, X., Sun, H. & Shinohara, H., 2018 12 14, 2018 IEEE Asian Solid-State Circuits Conference, A-SSCC 2018 - Proceedings. Institute of Electrical and Electronics Engineers Inc., p. 161-164 4 p. 8579315. (2018 IEEE Asian Solid-State Circuits Conference, A-SSCC 2018 - Proceedings).研究成果: Conference contribution
Static random access storage
Bit error rate
Aging of materials
Temperature
1
引用
(Scopus)
High-throughput von Neumann post-processing for random number generator
Zhang, R., Chen, S., Wan, C. & Shinohara, H., 2018 6 5, 2018 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2018. Institute of Electrical and Electronics Engineers Inc., p. 1-4 4 p.研究成果: Conference contribution
Random number Generator
Post-processing
High Throughput
Throughput
Output
Accurate nanopower supply-insensitive CMOS unit Vth extractor and α Vth extractor with continuous variety
Wang, J., Ding, L., Li, Q., Shinohara, H. & Inoue, Y., 2017 5 1, ： : IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences. E100A, 5, p. 1145-1155 11 p.研究成果: Article
Extractor
Oxides
Semiconductors
Metals
Voltage
3
引用
(Scopus)
Analysis and reduction of SRAM PUF Bit Error Rate
Shinohara, H., Zheng, B., Piao, Y., Liu, B. & Liu, S., 2017 6 5, 2017 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2017. Institute of Electrical and Electronics Engineers Inc., 7939688研究成果: Conference contribution
Static random access storage
Bit error rate
Transistors
Hardware security