• 946 引用
  • 13 h指数
1981 …2019

Research output per year

Pureに変更を加えた場合、すぐここに表示されます。

研究成果

Article

A 45-nm 37.3 GOPS/W heterogeneous multi-core SOC with 16/32 bit instruction-set general-purpose core

Nishii, O., Yuyama, Y., Ito, M., Kiyoshige, Y., Nitta, Y., Ishikawa, M., Yamada, T., Miyakoshi, J., Wada, Y., Kimura, K., Kasahara, H. & Maejima, H., 2011 4, : : IEICE Transactions on Electronics. E94-C, 4, p. 663-669 7 p.

研究成果: Article

10 引用 (Scopus)
1 引用 (Scopus)

Application of df/ihs to minimum total weighted flow time multiprocessor scheduling problems

Kasahara, H., Kai, M., Narita, S. & Wada, H., 1988 6, : : Systems and Computers in Japan. 19, 6, p. 25-34 10 p.

研究成果: Article

102 引用 (Scopus)

Coarse grain parallelism detection scheme of a fortran program

Honda, H. & Kasahara, H., 1991, : : Systems and Computers in Japan. 22, 12, p. 24-36 13 p.

研究成果: Article

3 引用 (Scopus)
2 引用 (Scopus)

Data-localization scheduling inside processor-cluster for multigrain parallel processing

Yoshida, A., Koshizuka, KI., Ogata, W. & Kasahara, H., 1997, : : IEICE Transactions on Information and Systems. E80-D, 4, p. 473-478 6 p.

研究成果: Article

Heterogeneous multi-core architecture that enables 54x AAC-LC stereo encoding

Shikano, H., Ito, M., Onouchi, M., Todaka, T., Tsunoda, T., Kodama, T., Uchiyama, K., Odaka, T., Kamei, T., Nagahama, E., Kusaoke, M., Nitta, Y., Wada, Y., Kimura, K. & Kasahara, H., 2008 1 1, : : IEEE Journal of Solid-State Circuits. 43, 4, p. 902-908 7 p.

研究成果: Article

15 引用 (Scopus)

Humanoid robots in Waseda University - Hadaly-2 and WABIAN

Hashimoto, S., Narita, S., Kasahara, H., Shirai, K., Kobayashi, T., Takanishi, A., Sugano, S., Yamaguchi, J., Sawada, H., Takanobu, H., Shibuya, K., Morita, T., Kurata, T., Onoe, N., Ouchi, K., Noguchi, T., Niwa, Y., Nagayama, S., Tabayashi, H., Matsui, I. および44人, Obata, M., Matsuzaki, H., Murasugi, A., Kobayashi, T., Haruyama, S., Okada, T., Hidaki, Y., Taguchi, Y., Hoashi, K., Morikawa, E., Iwano, Y., Araki, D., Suzuki, J., Yokoyama, M., Dawa, I., Nishino, D., Inoue, S., Hirano, T., Soga, E., Gen, S., Yanada, T., Kato, K., Sakamoto, S., Ishii, Y., Matsuo, S., Yamamoto, Y., Sato, K., Hagiwara, T., Ueda, T., Honda, N., Hashimoto, K., Hanamoto, T., Kayaba, S., Kojima, T., Iwata, H., Kubodera, H., Matsuki, R., Nakajima, T., Nitto, K., Yamamoto, D., Kamizaki, Y., Nagaike, S., Kunitake, Y. & Morita, S., 2002 1, : : Autonomous Robots. 12, 1, p. 25-38 14 p.

研究成果: Article

33 引用 (Scopus)

IEEE Division VIII Delegate/Director Candidates

Kasahara, H., 2017 1 1, Computer, 50, 8, p. 94-95 2 p.

研究成果: Article

公開

IEEE President-Elect Candidates Address Computer Society Concerns

Kasahara, H., 2017 1 1, Computer, 50, 8, p. 96-100 5 p.

研究成果: Article

公開

Kasahara Voted 2017 Computer Society President-Elect

Kasahara, H. & Gaudiot, J. L., 2016 12 1, Computer, 49, 12, p. 90-92 3 p.

研究成果: Article

3 引用 (Scopus)
101 引用 (Scopus)
3 引用 (Scopus)

Parallel processing of robot dynamics simulation using optimal multiprocessor scheduling algorithms

Kasahara, H., Iwata, M., Narita, S. & Fujii, H., 1988 10, : : Systems and Computers in Japan. 19, 10, p. 45-54 10 p.

研究成果: Article

Parallel processing scheme of a basic block in a Fortran program on OSCAR

Honda, H., Kasahara, H., Narita, S. & Mizuno, S., 1991, : : Systems and Computers in Japan. 22, 11, p. 1-13 13 p.

研究成果: Article

Power-aware compiler controllable chip multiprocessor

Shikano, H., Shirako, J., Wada, Y., Kimura, K. & Kasahara, H., 2008 4, : : IEICE Transactions on Electronics. E91-C, 4, p. 432-439 8 p.

研究成果: Article

1 引用 (Scopus)
285 引用 (Scopus)
1 引用 (Scopus)

Static Coarse Grain Task Scheduling with Cache Optimization Using OpenMP

Nakano, H., Ishizaka, K., Obata, M., Kimura, K. & Kasahara, H., 2003 6, : : International Journal of Parallel Programming. 31, 3, p. 211-223 13 p.

研究成果: Article

2 引用 (Scopus)

What Will 2022 Look Like? The IEEE CS 2022 Report

Alkhatib, H., Faraboschi, P., Frachtenberg, E., Kasahara, H., Lange, D., Laplante, P., Merchant, A., Milojicic, D. & Schwan, K., 2015 3 1, : : Computer. 48, 3, p. 68-76 9 p., 7063168.

研究成果: Article

11 引用 (Scopus)
Book

Heterogeneous multicore processor technologies for embedded systems

Uchiyama, K., Arakawa, F., Kasahara, H., Nojiri, T., Noda, H., Tawara, Y., Idehara, A., Iwata, K. & Shikano, H., 2012 10 1, Springer New York. 224 p.

研究成果: Book

5 引用 (Scopus)
Chapter

Parallel processing of the solution of ordinary differential equations on a general purpose multiprocessor system OSCAR

Kasahara, H., Takane, E., Sato, H., Hisanaga, Y. & Narita, S., 1988 9, Bulletin of Centre for Informatics (Waseda University). 巻 8. p. 1-8 8 p.

研究成果: Chapter

Conference contribution

A 4320MIPS four-processor core SMP/AMP with individually managed clock frequency for low power consumption

Yoshida, Y., Kamei, T., Hayase, K., Shibahara, S., Nishii, O., Hattori, T., Hasegawa, A., Takada, M., Irie, N., Uchiyama, K., Odaka, T., Takada, K., Kimura, K. & Kasahara, H., 2007, Digest of Technical Papers - IEEE International Solid-State Circuits Conference. 4242284

研究成果: Conference contribution

24 引用 (Scopus)

A 45nm 37.3GOPS/W heterogeneous multi-core SoC

Yuyama, Y., Ito, M., Kiyoshige, Y., Nitta, Y., Matsui, S., Nishii, O., Hasegawa, A., Ishikawa, M., Yamada, T., Miyakoshi, J., Terada, K., Nojiri, T., Satoh, M., Mizuno, H., Uchiyama, K., Wada, Y., Kimura, K., Kasahara, H. & Maejima, H., 2010, Digest of Technical Papers - IEEE International Solid-State Circuits Conference. 巻 53. p. 100-101 2 p. 5434031

研究成果: Conference contribution

29 引用 (Scopus)

Accelerating Multicore Architecture Simulation Using Application Profile

Kimura, K., Taguchi, G. & Kasahara, H., 2016 12 5, Proceedings - IEEE 10th International Symposium on Embedded Multicore/Many-Core Systems-on-Chip, MCSoC 2016. Institute of Electrical and Electronics Engineers Inc., p. 177-184 8 p. 7774436

研究成果: Conference contribution

A multi-grain parallelizing compilation scheme for OSCAR (Optimally scheduled advanced multiprocessor)

Kasahara, H., Honda, H., Mogi, A., Ogura, A., Fujiwara, K. & Narita, S., 1992 1 1, Languages and Compilers for Parallel Computing - 4th International Workshop, Proceedings. Springer-Verlag, p. 283-297 15 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); 巻数 589 LNCS).

研究成果: Conference contribution

11 引用 (Scopus)

An 8640 MIPS SoC with independent power-off control of 8 CPUs and 8 RAMs by an automatic parallelizing compiler

Ito, M., Hattori, T., Yoshida, Y., Hayase, K., Hayashi, T., Nishii, O., Yasu, Y., Hasegawa, A., Takada, M., Ito, M., Mizuno, H., Uchiyama, K., Odaka, T., Shirako, J., Mase, M., Kimura, K. & Kasahara, H., 2008, Digest of Technical Papers - IEEE International Solid-State Circuits Conference. 巻 51. 4523071

研究成果: Conference contribution

32 引用 (Scopus)

An efficient OR-parallel processing scheme of Prolog: Hierarchical pincers attack search

Kai, M. & Kasahara, H., 1991 12 1, IEEE Pacific Rim Conference on Communications, Computers and Signal Processing. Conference Proceedings. Anon (版). Publ by IEEE, p. 677-680 4 p. (IEEE Pacific Rim Conference on Communications, Computers and Signal Processing. Conference Proceedings).

研究成果: Conference contribution

Annotatable systrace: An extended linux ftrace for tracing a parallelized program

Fukui, D., Shimaoka, M., Mikami, H., Hillenbrand, D., Yamamoto, H., Kimura, K. & Kasahara, H., 2015 10 27, SEPS 2015 - Proceedings of the 2nd International Workshop on Software Engineering for Parallel Systems. Association for Computing Machinery, Inc, p. 21-25 5 p.

研究成果: Conference contribution

A parallelizing compiler cooperative heterogeneous multicore processor architecture

Wada, Y., Hayashi, A., Masuura, T., Shirako, J., Nakano, H., Shikano, H., Kimura, K. & Kasahara, H., 2011, Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). 巻 6760 LNCS. p. 215-233 19 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); 巻数 6760 LNCS).

研究成果: Conference contribution

APPROACH TO SUPERCOMPUTING USING MULTIPROCESSOR SCHEDULING ALGORITHMS.

Kasahara, H. & Narita, S., 1985, Unknown Host Publication Title. New York, NY, USA: IEEE, p. 139-148 10 p.

研究成果: Conference contribution

7 引用 (Scopus)

Architecture design for the environmental monitoring system over the winter season

Yamashita, K., Ao, C., Suzuki, T., Xu, Y., Li, H., Tian, J., Kimura, K. & Kasahara, H., 2016 11 13, MobiWac 2016 - Proceedings of the 14th ACM International Symposium on Mobility Management and Wireless Access, co-located with MSWiM 2016. Association for Computing Machinery, Inc, p. 27-34 8 p.

研究成果: Conference contribution

1 引用 (Scopus)

Automatic coarse grain task parallel processing on SMP using openMP

Kasahara, H., Obata, M. & Ishizaka, K., 2001 1 1, Languages and Compilers for Parallel Computing - 13th International Workshop, LCPC 2000, Revised Papers. Ferrante, J., Midkiff, S. P., Moreira, J. E., Gupta, M., Chatterjee, S., Prins, J., Pugh, W. & Tseng, C-W. (版). Springer Verlag, p. 189-207 19 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); 巻数 2017).

研究成果: Conference contribution

10 引用 (Scopus)

Automatic local memory management for multicores having global address space

Yamamoto, K., Shirakawa, T., Oki, Y., Yoshida, A., Kimura, K. & Kasahara, H., 2017, Languages and Compilers for Parallel Computing - 29th International Workshop, LCPC 2016, Revised Papers. Springer Verlag, 巻 10136 LNCS. p. 282-296 15 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); 巻数 10136 LNCS).

研究成果: Conference contribution

1 引用 (Scopus)

Automatic parallelization, performance predictability and power control for mobile-applications

Hillenbrand, D., Hayashi, A., Yamamoto, H., Kimura, K. & Kasahara, H., 2013, IEEE Symposium on Low-Power and High-Speed Chips - Proceedings for 2013 COOL Chips XVI. 6547919

研究成果: Conference contribution

1 引用 (Scopus)

Coarse grain task parallelization of earthquake simulator GMS using OSCAR compiler on various Cc-NUMA servers

Shimaoka, M., Wada, Y., Kimura, K. & Kasahara, H., 2016, Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). Springer Verlag, 巻 9519. p. 238-253 16 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); 巻数 9519).

研究成果: Conference contribution

Coarse-grain task parallel processing using the openMP backend of the OSCAR multigrain parallelizing compiler

Ishizaka, K., Obata, M. & Kasahara, H., 2000, Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). Springer Verlag, 巻 1940. p. 457-470 14 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); 巻数 1940).

研究成果: Conference contribution

5 引用 (Scopus)

Compilation scheme for near fine grain parallel processing on a multiprocessor system without explicit synchronization

Ogata, W., Fujimoto, K., Oota, M. & Kasahara, H., 1995, IEEE Pacific RIM Conference on Communications, Computers, and Signal Processing - Proceedings. Piscataway, NJ, United States: IEEE, p. 327-332 6 p.

研究成果: Conference contribution

1 引用 (Scopus)

Compiler control power saving scheme for multi core processors

Shirako, J., Oshiyama, N., Wada, Y., Shikano, H., Kimura, K. & Kasahara, H., 2006 12 1, Languages and Compilers for Parallel Computing - 18th International Workshop, LCPC 2005, Revised Selected Papers. p. 362-376 15 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); 巻数 4339 LNCS).

研究成果: Conference contribution

16 引用 (Scopus)