• 263 引用
  • 9 h指数
19972020

年単位の研究成果

Pureに変更を加えた場合、すぐここに表示されます。

研究成果

2020

Compiler software coherent control for embedded high performance multicore

Adhi, B. A., Kashimata, T., Takahashi, K., Kimura, K. & Kasahara, H., 2020 3 1, : : IEICE Transactions on Electronics. E103.C, 3, p. 85-97 13 p.

研究成果: Article

Local memory mapping of multicore processors on an automatic parallelizing compiler

Oki, Y., Abe, Y., Yamamoto, K., Yamamoto, K., Shirakawa, T., Yoshida, A., Kimura, K. & Kasahara, H., 2020 3 1, : : IEICE Transactions on Electronics. E103.C, 3, p. 98-109 12 p.

研究成果: Article

2019

Cascaded DMA controller for speedup of indirect memory access in irregular applications

Kashimata, T., Kitamura, T., Kimura, K. & Kasahara, H., 2019 11, 2019 IEEE/ACM 9th Workshop on Irregular Applications: Architectures and Algorithms, IA3 2019. Institute of Electrical and Electronics Engineers Inc., p. 71-76 6 p. 8945078. (2019 IEEE/ACM 9th Workshop on Irregular Applications: Architectures and Algorithms, IA3 2019).

研究成果: Conference contribution

Compiler-support for critical data persistence in NVM

Elkhouly, R., Alshboul, M., Hayashi, A., Solihin, Y. & Kimura, K., 2019 12, : : ACM Transactions on Architecture and Code Optimization. 16, 4, 54.

研究成果: Article

公開

Efficient checkpointing with recompute scheme for non-volatile main memory

Alshboul, M., Elnawawy, H., Elkhouly, R., Kimura, K., Tuck, J. & Solihin, Y., 2019 5, : : ACM Transactions on Architecture and Code Optimization. 16, 2, 18.

研究成果: Article

2 引用 (Scopus)

Performance Evaluation on NVMM Emulator Employing Fine-Grain Delay Injection

Omori, Y. & Kimura, K., 2019 8, Proceedings - 2019 IEEE Non-Volatile Memory Systems and Applications Symposium, NVMSA 2019. Institute of Electrical and Electronics Engineers Inc., 8863522. (Proceedings - 2019 IEEE Non-Volatile Memory Systems and Applications Symposium, NVMSA 2019).

研究成果: Conference contribution

2017

An Android Systrace Extension for Tracing Wakelocks

Binh, B. D. & Kimura, K., 2017 7 14, Proceedings - 19th IEEE International Conference on Computational Science and Engineering, 14th IEEE International Conference on Embedded and Ubiquitous Computing and 15th International Symposium on Distributed Computing and Applications to Business, Engineering and Science, CSE-EUC-DCABES 2016. Institute of Electrical and Electronics Engineers Inc., p. 146-149 4 p. 7982237

研究成果: Conference contribution

1 引用 (Scopus)

Automatic local memory management for multicores having global address space

Yamamoto, K., Shirakawa, T., Oki, Y., Yoshida, A., Kimura, K. & Kasahara, H., 2017, Languages and Compilers for Parallel Computing - 29th International Workshop, LCPC 2016, Revised Papers. Springer Verlag, 巻 10136 LNCS. p. 282-296 15 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); 巻数 10136 LNCS).

研究成果: Conference contribution

2 引用 (Scopus)

Multicore Cache Coherence Control by a Parallelizing Compiler

Kasahara, H., Kimura, K., Adhi, B. A., Hosokawa, Y., Kishimoto, Y. & Mase, M., 2017 9 7, Proceedings - 2017 IEEE 41st Annual Computer Software and Applications Conference, COMPSAC 2017. IEEE Computer Society, 巻 1. p. 492-497 6 p. 8029648

研究成果: Conference contribution

1 引用 (Scopus)
2016

2-Step Power Scheduling with Adaptive Control Interval for Network Intrusion Detection Systems on Multicores

Tuong, L. P. & Kimura, K., 2016 12 5, Proceedings - IEEE 10th International Symposium on Embedded Multicore/Many-Core Systems-on-Chip, MCSoC 2016. Institute of Electrical and Electronics Engineers Inc., p. 69-76 8 p. 7774422

研究成果: Conference contribution

1 引用 (Scopus)

Accelerating Multicore Architecture Simulation Using Application Profile

Kimura, K., Taguchi, G. & Kasahara, H., 2016 12 5, Proceedings - IEEE 10th International Symposium on Embedded Multicore/Many-Core Systems-on-Chip, MCSoC 2016. Institute of Electrical and Electronics Engineers Inc., p. 177-184 8 p. 7774436

研究成果: Conference contribution

Architecture design for the environmental monitoring system over the winter season

Yamashita, K., Ao, C., Suzuki, T., Xu, Y., Li, H., Tian, J., Kimura, K. & Kasahara, H., 2016 11 13, MobiWac 2016 - Proceedings of the 14th ACM International Symposium on Mobility Management and Wireless Access, co-located with MSWiM 2016. Association for Computing Machinery, Inc, p. 27-34 8 p.

研究成果: Conference contribution

2 引用 (Scopus)

Coarse grain task parallelization of earthquake simulator GMS using OSCAR compiler on various Cc-NUMA servers

Shimaoka, M., Wada, Y., Kimura, K. & Kasahara, H., 2016, Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). Springer Verlag, 巻 9519. p. 238-253 16 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); 巻数 9519).

研究成果: Conference contribution

Multigrain parallelization for model-based design applications using the OSCAR compiler

Umeda, D., Suzuki, T., Mikami, H., Kimura, K. & Kasahara, H., 2016, Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). Springer Verlag, 巻 9519. p. 125-139 15 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); 巻数 9519).

研究成果: Conference contribution

4 引用 (Scopus)

Reducing parallelizing compilation time by removing redundant analysis

Han, J. X., Fujino, R., Tamura, R., Shimaoka, M., Mikami, H., Takamura, M., Kamiya, S., Suzuki, K., Miyajima, T., Kimura, K. & Kasahara, H., 2016 10 21, SEPS 2016 - Proceedings of the 3rd International Workshop on Software Engineering for Parallel Systems, co-located with SPLASH 2016. Association for Computing Machinery, Inc, p. 1-9 9 p.

研究成果: Conference contribution

2015

Annotatable systrace: An extended linux ftrace for tracing a parallelized program

Fukui, D., Shimaoka, M., Mikami, H., Hillenbrand, D., Yamamoto, H., Kimura, K. & Kasahara, H., 2015 10 27, SEPS 2015 - Proceedings of the 2nd International Workshop on Software Engineering for Parallel Systems. Association for Computing Machinery, Inc, p. 21-25 5 p.

研究成果: Conference contribution

Evaluation of automatic power reduction with OSCAR compiler on Intel Haswell and ARM Cortex-A9 multicores

Hirano, T., Yamamoto, H., Iizuka, S., Muto, K., Goto, T., Wake, T., Mikami, H., Takamura, M., Kimura, K. & Kasahara, H., 2015, Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). Springer Verlag, 巻 8967. p. 239-252 14 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); 巻数 8967).

研究成果: Conference contribution

2 引用 (Scopus)

OSCAR compiler controlled multicore power reduction on android platform

Yamamoto, H., Hirano, T., Muto, K., Mikami, H., Goto, T., Hillenbrand, D., Takamura, M., Kimura, K. & Kasahara, H., 2014 1 1, Languages and Compilers for Parallel Computing - 26th International Workshop, LCPC 2013, Revised Selected Papers. Caşcaval, C. & Montesinos, P. (版). Springer Verlag, p. 155-168 14 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); 巻数 8664).

研究成果: Conference contribution

1 引用 (Scopus)
2013

Automatic parallelization, performance predictability and power control for mobile-applications

Hillenbrand, D., Hayashi, A., Yamamoto, H., Kimura, K. & Kasahara, H., 2013 8 15, IEEE Symposium on Low-Power and High-Speed Chips - Proceedings for 2013 COOL Chips XVI. 6547919. (IEEE Symposium on Low-Power and High-Speed Chips - Proceedings for 2013 COOL Chips XVI).

研究成果: Conference contribution

1 引用 (Scopus)

Evaluation of power consumption at execution of multiple automatically parallelized and power controlled media applications on the RP2 low-power multicore

Mikami, H., Kitaki, S., Mase, M., Hayashi, A., Shimaoka, M., Kimura, K., Edahiro, M. & Kasahara, H., 2013, Languages and Compilers for Parallel Computing - 24th International Workshop, LCPC 2011, Revised Selected Papers. p. 31-45 15 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); 巻数 7146 LNCS).

研究成果: Conference contribution

1 引用 (Scopus)

Parallelization of automotive engine control software on embedded multi-core processor using OSCAR compiler

Kanehagi, Y., Umeda, D., Hayashi, A., Kimura, K. & Kasahara, H., 2013 8 15, IEEE Symposium on Low-Power and High-Speed Chips - Proceedings for 2013 COOL Chips XVI. 6547921. (IEEE Symposium on Low-Power and High-Speed Chips - Proceedings for 2013 COOL Chips XVI).

研究成果: Conference contribution

3 引用 (Scopus)

Reconciling application power control and operating systems for optimal power and performance

Hillenbrand, D., Furuyama, Y., Hayashi, A., Mikami, H., Kimura, K. & Kasahara, H., 2013 9 16, 2013 8th International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip, ReCoSoC 2013. 6581539. (2013 8th International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip, ReCoSoC 2013).

研究成果: Conference contribution

4 引用 (Scopus)
2012

Enhancing the performance of a multiplayer game by using a parallelizing compiler

Al-Dosary, Y. I. M., Kimura, K., Kasahara, H. & Narita, S., 2012 11 19, Proceedings of CGAMES'2012 USA - 17th International Conference on Computer Games: AI, Animation, Mobile, Interactive Multimedia, Educational and Serious Games. p. 67-75 9 p. 6314554. (Proceedings of CGAMES'2012 USA - 17th International Conference on Computer Games: AI, Animation, Mobile, Interactive Multimedia, Educational and Serious Games).

研究成果: Conference contribution

2011

A 45-nm 37.3 GOPS/W heterogeneous multi-core SOC with 16/32 bit instruction-set general-purpose core

Nishii, O., Yuyama, Y., Ito, M., Kiyoshige, Y., Nitta, Y., Ishikawa, M., Yamada, T., Miyakoshi, J., Wada, Y., Kimura, K., Kasahara, H. & Maejima, H., 2011 4, : : IEICE Transactions on Electronics. E94-C, 4, p. 663-669 7 p.

研究成果: Article

A parallelizing compiler cooperative heterogeneous multicore processor architecture

Wada, Y., Hayashi, A., Masuura, T., Shirako, J., Nakano, H., Shikano, H., Kimura, K. & Kasahara, H., 2011 12 1, Transactions on High-Performance Embedded Architectures and Compilers IV. Stenstrom, P. (版). p. 215-233 19 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); 巻数 6760 LNCS).

研究成果: Conference contribution

Parallelizing compiler framework and API for power reduction and software productivity of real-time heterogeneous multicores

Hayashi, A., Wada, Y., Watanabe, T., Sekiguchi, T., Mase, M., Shirako, J., Kimura, K. & Kasahara, H., 2011 3 18, Languages and Compilers for Parallel Computing - 23rd International Workshop, LCPC 2010, Revised Selected Papers. p. 184-198 15 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); 巻数 6548 LNCS).

研究成果: Conference contribution

9 引用 (Scopus)
2010

A 45nm 37.3GOPS/W heterogeneous multi-core SoC

Yuyama, Y., Ito, M., Kiyoshige, Y., Nitta, Y., Matsui, S., Nishii, O., Hasegawa, A., Ishikawa, M., Yamada, T., Miyakoshi, J., Terada, K., Nojiri, T., Satoh, M., Mizuno, H., Uchiyama, K., Wada, Y., Kimura, K., Kasahara, H. & Maejima, H., 2010 5 18, 2010 IEEE International Solid-State Circuits Conference, ISSCC 2010 - Digest of Technical Papers. p. 100-101 2 p. 5434031. (Digest of Technical Papers - IEEE International Solid-State Circuits Conference; 巻数 53).

研究成果: Conference contribution

29 引用 (Scopus)

OSCAR API for real-time low-power multicores and its performance on multicores and SMP servers

Kimura, K., Mase, M., Mikami, H., Miyamoto, T., Shirako, J. & Kasahara, H., 2010 7 14, Languages and Compilers for Parallel Computing - 22nd International Workshop, LCPC 2009, Revised Selected Papers. p. 188-202 15 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); 巻数 5898 LNCS).

研究成果: Conference contribution

20 引用 (Scopus)
2009

Foreword: Special section on hardware and software technologies on advanced microprocessors

Inoue, K., Kai, K., Arakawa, F., Inoue, A., Hirose, Y., Kyo, S., Kimura, K., Kuga, M., Kondo, M., Sato, T., Satoh, M., Tomiyama, H., Nakamura, H., Hayashi, H., Hariyama, M., Matsutani, H. & Uchiyama, K., 2009, : : IEICE Transactions on Electronics. E92-C, 10, 1 p.

研究成果: Editorial

Green multicore-SoC software-execution framework with timely-power-gating scheme

Onouchi, M., Toyama, K., Nojiri, T., Sato, M., Mase, M., Shirako, J., Sato, M., Takada, M., Ito, M., Mizuno, H., Namiki, M., Kimura, K. & Kasahara, H., 2009, ICPP-2009 - The 38th International Conference on Parallel Processing. p. 510-517 8 p. 5362472. (Proceedings of the International Conference on Parallel Processing).

研究成果: Conference contribution

1 引用 (Scopus)
2008

An 8640 MIPS SoC with independent power-off control of 8 CPUs and 8 RAMs by an automatic parallelizing compiler

Ito, M., Hattori, T., Yoshida, Y., Hayase, K., Hayashi, T., Nishii, O., Yasu, Y., Hasegawa, A., Takada, M., Ito, M., Mizuno, H., Uchiyama, K., Odaka, T., Shirako, J., Mase, M., Kimura, K. & Kasahara, H., 2008 8 21, 2008 IEEE International Solid State Circuits Conference - Digest of Technical Papers, ISSCC. p. 90-91+598+81 4523071. (Digest of Technical Papers - IEEE International Solid-State Circuits Conference; 巻数 51).

研究成果: Conference contribution

34 引用 (Scopus)

Heterogeneous multi-core architecture that enables 54x AAC-LC stereo encoding

Shikano, H., Ito, M., Onouchi, M., Todaka, T., Tsunoda, T., Kodama, T., Uchiyama, K., Odaka, T., Kamei, T., Nagahama, E., Kusaoke, M., Nitta, Y., Wada, Y., Kimura, K. & Kasahara, H., 2008 1, : : IEEE Journal of Solid-State Circuits. 43, 4, p. 902-908 7 p.

研究成果: Article

15 引用 (Scopus)

Parallelization with automatic parallelizing compiler generating consumer electronics multicore API

Miyamoto, T., Asaka, S., Mikami, H., Mase, M., Wada, Y., Nakano, H., Kimura, K. & Kasahara, H., 2008 12 1, Proceedings of the 2008 International Symposium on Parallel and Distributed Processing with Applications, ISPA 2008. p. 600-607 8 p. 4725200. (Proceedings of the 2008 International Symposium on Parallel and Distributed Processing with Applications, ISPA 2008).

研究成果: Conference contribution

6 引用 (Scopus)

Performance evaluation of compiler controlled power saving scheme

Shirako, J., Yoshida, M., Oshiyama, N., Wada, Y., Nakano, H., Shikano, H., Kimura, K. & Kasahara, H., 2008 2 1, High-Performance Computing - 6th International Symposium, ISHPC 2005 and First International Workshop on Advanced Low Power Systems, ALPS 2006, Revised Selected Papers. p. 480-493 14 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); 巻数 4759 LNCS).

研究成果: Conference contribution

2 引用 (Scopus)

Power-aware compiler controllable chip multiprocessor

Shikano, H., Shirako, J., Wada, Y., Kimura, K. & Kasahara, H., 2008 4, : : IEICE Transactions on Electronics. E91-C, 4, p. 432-439 8 p.

研究成果: Article

1 引用 (Scopus)

Power Reduction Controll for Multicores in OSCAR Multigrain Parallelizing Compiler

Shirako, J., Kimura, K. & Kasahara, H., 2008 12 1, 2008 International SoC Design Conference, ISOCC 2008. p. I50-I55 4815571. (2008 International SoC Design Conference, ISOCC 2008; 巻数 1).

研究成果: Conference contribution

Software-cooperative power-efficient heterogeneous multi-core for media processing

Shikano, H., Ito, M., Uchiyama, K., Odaka, T., Hayashi, A., Masuura, T., Mase, M., Shirako, J., Wada, Y., Kimura, K. & Kasahara, H., 2008 8 21, 2008 Asia and South Pacific Design Automation Conference, ASP-DAC. p. 736-741 6 p. 4484049. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC).

研究成果: Conference contribution

7 引用 (Scopus)
2007

A 4320MIPS four-processor core SMP/AMP with individually managed clock frequency for low power consumption

Yoshida, Y., Kamei, T., Hayase, K., Shibahara, S., Nishii, O., Hattori, T., Hasegawa, A., Takada, M., Irie, N., Uchiyama, K., Odaka, T., Takada, K., Kimura, K. & Kasahara, H., 2007 9 27, 2007 IEEE International Solid-State Circuits Conference, ISSCC - Digest of Technical Papers. p. 100-101+590+95 4242284. (Digest of Technical Papers - IEEE International Solid-State Circuits Conference).

研究成果: Conference contribution

24 引用 (Scopus)

Heterogeneous multiprocessor on a chip which enables 54x AAC-LC stereo encoding

Ito, M., Todaka, T., Tsunoda, T., Tanaka, H., Kodama, T., Shikano, H., Onouchi, M., Uchiyama, K., Odaka, T., Kamei, T., Nagahama, E., Kusaoke, M., Nitta, Y., Wada, Y., Kimura, K. & Kasahara, H., 2007 12 1, 2007 Symposium on VLSI Circuits, VLSIC - Digest of Technical Papers. p. 18-19 2 p. 4342719. (IEEE Symposium on VLSI Circuits, Digest of Technical Papers).

研究成果: Conference contribution

7 引用 (Scopus)

Power-aware compiler controllable chip multiprocessor

Shikano, H., Shirako, J., Wada, Y., Kimura, K. & Kasahara, H., 2007 12 1, 16th International Conference on Parallel Architecture and Compilation Techniques, PACT 2007. 1 p. 4336255. (Parallel Architectures and Compilation Techniques - Conference Proceedings, PACT).

研究成果: Conference contribution

1 引用 (Scopus)
2006

Compiler control power saving scheme for multi core processors

Shirako, J., Oshiyama, N., Wada, Y., Shikano, H., Kimura, K. & Kasahara, H., 2006 12 1, Languages and Compilers for Parallel Computing - 18th International Workshop, LCPC 2005, Revised Selected Papers. p. 362-376 15 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); 巻数 4339 LNCS).

研究成果: Conference contribution

16 引用 (Scopus)
2005

Multigrain parallel processing on compiler cooperative chip multiprocessor

Kimura, K., Wada, Y., Nakano, H., Kodaka, T., Shirako, J., Ishizaka, K. & Kasahara, H., 2005 12 1, : : Proceedings - Annual Workshop on Interaction between Compilers and Computer Architectures, INTERACT. 2005, p. 11-21 11 p., 1423137.

研究成果: Conference article

13 引用 (Scopus)

Performance of OSCAR multigrain parallelizing compiler on SMP servers

Ishizaka, K., Miyamoto, T., Shirako, J., Obata, M., Kimura, K. & Kasahara, H., 2005 10 19, : : LECTURE NOTES IN COMPUTER SCIENCE. 3602, p. 319-331 13 p.

研究成果: Conference article

5 引用 (Scopus)
2004

Memory management for data localization on OSCAR chip multiprocessor

Nakano, H., Kodaka, T., Kimura, K. & Kasahara, H., 2004 12 1, p. 82-88. 7 p.

研究成果: Paper

3 引用 (Scopus)
1 引用 (Scopus)
2003
3 引用 (Scopus)

Multigrain parallel processing on OSCAR CMP

Kimura, K., Kodaka, T., Obata, M. & Kasahara, H., 2003 1 1, Innovative Architecture for Future Generation High-Performance Processors and Systems, IWIA 2003. Veidenbaum, A. & Joe, K. (版). IEEE Computer Society, p. 56-65 10 p. 1262783. (Proceedings of the Innovative Architecture for Future Generation High-Performance Processors and Systems; 巻数 2003-January).

研究成果: Conference contribution

6 引用 (Scopus)