• 260 引用
  • 9 h指数
19972019

Research output per year

Pureに変更を加えた場合、すぐここに表示されます。

研究成果

フィルター
Article
2019

Efficient checkpointing with recompute scheme for non-volatile main memory

Alshboul, M., Elnawawy, H., Elkhouly, R., Kimura, K., Tuck, J. & Solihin, Y., 2019 5, : : ACM Transactions on Architecture and Code Optimization. 16, 2, 18.

研究成果: Article

2 引用 (Scopus)
2016
2011

A 45-nm 37.3 GOPS/W heterogeneous multi-core SOC with 16/32 bit instruction-set general-purpose core

Nishii, O., Yuyama, Y., Ito, M., Kiyoshige, Y., Nitta, Y., Ishikawa, M., Yamada, T., Miyakoshi, J., Wada, Y., Kimura, K., Kasahara, H. & Maejima, H., 2011 4, : : IEICE Transactions on Electronics. E94-C, 4, p. 663-669 7 p.

研究成果: Article

2008

Heterogeneous multi-core architecture that enables 54x AAC-LC stereo encoding

Shikano, H., Ito, M., Onouchi, M., Todaka, T., Tsunoda, T., Kodama, T., Uchiyama, K., Odaka, T., Kamei, T., Nagahama, E., Kusaoke, M., Nitta, Y., Wada, Y., Kimura, K. & Kasahara, H., 2008 1 1, : : IEEE Journal of Solid-State Circuits. 43, 4, p. 902-908 7 p.

研究成果: Article

15 引用 (Scopus)

Power-aware compiler controllable chip multiprocessor

Shikano, H., Shirako, J., Wada, Y., Kimura, K. & Kasahara, H., 2008 4, : : IEICE Transactions on Electronics. E91-C, 4, p. 432-439 8 p.

研究成果: Article

1 引用 (Scopus)
2003
3 引用 (Scopus)

Static Coarse Grain Task Scheduling with Cache Optimization Using OpenMP

Nakano, H., Ishizaka, K., Obata, M., Kimura, K. & Kasahara, H., 2003 6 1, : : International Journal of Parallel Programming. 31, 3, p. 211-223 13 p.

研究成果: Article

2 引用 (Scopus)