Keiji Kimura

Scopus著者プロファイル

ウェブサイトhttps://w-rdb.waseda.jp/html/100000436_ja.html

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年別の研究成果

Pureに変更を加えた場合、すぐここに表示されます。

44 Conference contribution
17 Article
3 Paper
2 Conference article
その他
- 2 Editorial
- 1 Review article

17 件

フィルター

2022
Accelerating Data Dependence Profiling Through Abstract Interpretation of Loop Instructions
Abbas, M., Soliman, M. I., Rabia, S. I., Kimura, K. & El-Mahdy, A., 2022, In: IEEE Access. 10, p. 31626-31640 15 p.
研究成果: Article › 査読

Open Access
Data stream clustering for low-cost machines
Cérin, C., Kimura, K. & Sow, M., 2022 8月, In: Journal of Parallel and Distributed Computing. 166, p. 57-70 14 p.
研究成果: Article › 査読
1 被引用数 (Scopus)
On the learnability of quantum state fidelity
Elsayed Amer, N., Gomaa, W., Kimura, K., Ueda, K. & El-Mahdy, A., 2022 12月, In: EPJ Quantum Technology. 9, 1, 31.
研究成果: Article › 査読

Open Access
Open-Source Hardware Memory Protection Engine Integrated with NVMM Simulator
Omori, Y. & Kimura, K., 2022, (Accepted/In press) In: IEEE Computer Architecture Letters. p. 1-4 4 p.
研究成果: Article › 査読
2021
Durable Queue Implementations Built on a Formally Defined Strand Persistency Model
Han, J. & Kimura, K., 2021, In: Journal of information processing. 29, p. 823-838 16 p.
研究成果: Article › 査読

Open Access
Non-volatile main memory emulator for embedded systems employing three NVMM behaviour models
Omori, Y. & Kimura, K., 2021, In: IEICE Transactions on Information and Systems. E104.D, 5, p. 697-708 12 p.
研究成果: Article › 査読

Open Access
1 被引用数 (Scopus)
Secure Image Inference Using Pairwise Activation Functions
Agyepong, J. T., Soliman, M., Wada, Y., Kimura, K. & El-Mahdy, A., 2021, In: IEEE Access. 9, p. 118271-118290 20 p., 9521226.
研究成果: Article › 査読

Open Access
1 被引用数 (Scopus)
2020
Compiler software coherent control for embedded high performance multicore
Adhi, B. A., Kashimata, T., Takahashi, K., Kimura, K. & Kasahara, H., 2020 3月 1, In: IEICE Transactions on Electronics. E103.C, 3, p. 85-97 13 p.
研究成果: Article › 査読
1 被引用数 (Scopus)
Local memory mapping of multicore processors on an automatic parallelizing compiler
Oki, Y., Abe, Y., Yamamoto, K., Yamamoto, K., Shirakawa, T., Yoshida, A., Kimura, K. & Kasahara, H., 2020 3月 1, In: IEICE Transactions on Electronics. E103.C, 3, p. 98-109 12 p.
研究成果: Article › 査読
2019
Compiler-support for critical data persistence in NVM
Elkhouly, R., Alshboul, M., Hayashi, A., Solihin, Y. & Kimura, K., 2019 12月, In: ACM Transactions on Architecture and Code Optimization. 16, 4, 54.
研究成果: Article › 査読

Open Access
2 被引用数 (Scopus)
Efficient checkpointing with recompute scheme for non-volatile main memory
Alshboul, M., Elnawawy, H., Elkhouly, R., Kimura, K., Tuck, J. & Solihin, Y., 2019 5月, In: ACM Transactions on Architecture and Code Optimization. 16, 2, 18.
研究成果: Article › 査読
8 被引用数 (Scopus)
2016
Android video processing system combined with automatically parallelized and power optimized code by OSCAR compiler
Binh, B. D., Hirano, T., Mikami, H., Yamamoto, H., Kimura, K. & Kasahara, H., 2016, In: Journal of information processing. 24, 3, p. 504-511 8 p.
研究成果: Article › 査読
2011
A 45-nm 37.3 GOPS/W heterogeneous multi-core SOC with 16/32 bit instruction-set general-purpose core
Nishii, O., Yuyama, Y., Ito, M., Kiyoshige, Y., Nitta, Y., Ishikawa, M., Yamada, T., Miyakoshi, J., Wada, Y., Kimura, K., Kasahara, H. & Maejima, H., 2011 4月, In: IEICE Transactions on Electronics. E94-C, 4, p. 663-669 7 p.
研究成果: Article › 査読
2008
Heterogeneous multi-core architecture that enables 54x AAC-LC stereo encoding
Shikano, H., Ito, M., Onouchi, M., Todaka, T., Tsunoda, T., Kodama, T., Uchiyama, K., Odaka, T., Kamei, T., Nagahama, E., Kusaoke, M., Nitta, Y., Wada, Y., Kimura, K. & Kasahara, H., 2008 1月, In: IEEE Journal of Solid-State Circuits. 43, 4, p. 902-908 7 p.
研究成果: Article › 査読
16 被引用数 (Scopus)
Power-aware compiler controllable chip multiprocessor
Shikano, H., Shirako, J., Wada, Y., Kimura, K. & Kasahara, H., 2008 4月, In: IEICE Transactions on Electronics. E91-C, 4, p. 432-439 8 p.
研究成果: Article › 査読
1 被引用数 (Scopus)
2003
Multigrain parallel processing on compiler cooperative OSCAR chip multiprocessor architecture
Kimura, K., Kodaka, T., Obata, M. & Kasahara, H., 2003 4月, In: IEICE Transactions on Electronics. E86-C, 4, p. 570-579 10 p.
研究成果: Article › 査読
3 被引用数 (Scopus)
Static Coarse Grain Task Scheduling with Cache Optimization Using OpenMP
Nakano, H., Ishizaka, K., Obata, M., Kimura, K. & Kasahara, H., 2003 6月, In: International Journal of Parallel Programming. 31, 3, p. 211-223 13 p.
研究成果: Article › 査読
2 被引用数 (Scopus)

木村 啓二

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木村啓二