• 829 引用
  • 14 h指数
19982020
Pureに変更を加えた場合、すぐここに表示されます。

研究成果 1998 2020

  • 829 引用
  • 14 h指数
  • 128 Conference contribution
  • 99 Article
  • 5 Chapter
  • 1 Letter
フィルター
Conference contribution
2019

Efficient Ising Model Mapping to Solving Slot Placement Problem

Kanamaru, S., Oku, D., Tawada, M., Tanaka, S., Hayashi, M., Yamaoka, M., Yanagisawa, M. & Togawa, N., 2019 3 6, 2019 IEEE International Conference on Consumer Electronics, ICCE 2019. Institute of Electrical and Electronics Engineers Inc., 8661947. (2019 IEEE International Conference on Consumer Electronics, ICCE 2019).

研究成果: Conference contribution

Ising model
Combinatorial optimization
Hamiltonians
Electric wiring
Simulated annealing

Error Correction Coding of Stochastic Numbers Using BER Measurement

Ishikawa, R., Tawada, M., Yanagisawa, M. & Togawa, N., 2019 7, 2019 IEEE 25th International Symposium on On-Line Testing and Robust System Design, IOLTS 2019. Gizopoulos, D., Alexandrescu, D., Papavramidou, P. & Maniatakos, M. (版). Institute of Electrical and Electronics Engineers Inc., p. 243-246 4 p. 8854450. (2019 IEEE 25th International Symposium on On-Line Testing and Robust System Design, IOLTS 2019).

研究成果: Conference contribution

Error correction
Bit error rate
Signal to noise ratio
Networks (circuits)

Landmark Seasonal Travel Distribution and Activity Prediction Based on Language-specific Analysis

Bao, S., Yanagisawa, M. & Togawa, N., 2019 1 22, Proceedings - 2018 IEEE International Conference on Big Data, Big Data 2018. Song, Y., Liu, B., Lee, K., Abe, N., Pu, C., Qiao, M., Ahmed, N., Kossmann, D., Saltz, J., Tang, J., He, J., Liu, H. & Hu, X. (版). Institute of Electrical and Electronics Engineers Inc., p. 3628-3637 10 p. 8622103. (Proceedings - 2018 IEEE International Conference on Big Data, Big Data 2018).

研究成果: Conference contribution

Recommender systems

Static error analysis and optimization of faithfully truncated adders for area-power efficient FIR designs

Ye, J., Togawa, N., Yanagisawa, M. & Shi, Y., 2019 1 1, 2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019 - Proceedings. Institute of Electrical and Electronics Engineers Inc., 8702386. (Proceedings - IEEE International Symposium on Circuits and Systems; 巻数 2019-May).

研究成果: Conference contribution

Adders
Error analysis
FIR filters
Costs
2018

2n RRR: Improved stochastic number duplicator based on bit re-arrangement

Ishikawa, R., Tawada, M., Yanagisawa, M. & Togawa, N., 2018 12 10, 2018 New Generation of CAS, NGCAS 2018. Institute of Electrical and Electronics Engineers Inc., p. 182-185 4 p. 8572289

研究成果: Conference contribution

flip-flops
Networks (circuits)
Flip flop circuits
output
Hyperbolic functions
1 引用 (Scopus)

A hardware-Trojan classification method utilizing boundary net structures

Hasegawa, K., Yanagisawa, M. & Togawa, N., 2018 3 26, 2018 IEEE International Conference on Consumer Electronics, ICCE 2018. Institute of Electrical and Electronics Engineers Inc., 巻 2018-January. p. 1-4 4 p.

研究成果: Conference contribution

Hardware
Learning systems
Hardware security

A loop structure optimization targeting high-level synthesis of fast number theoretic transform

Kawamura, K., Yanagisawa, M. & Togawa, N., 2018 5 9, 2018 19th International Symposium on Quality Electronic Design, ISQED 2018. IEEE Computer Society, 巻 2018-March. p. 106-111 6 p.

研究成果: Conference contribution

Field programmable gate arrays (FPGA)
Cryptography
Program processors
Hardware
High level synthesis
3 引用 (Scopus)

A low cost and high speed CSD-based symmetric transpose block FIR implementation

Ye, J., Shi, Y., Togawa, N. & Yanagisawa, M., 2018 1 8, Proceedings - 2017 IEEE 12th International Conference on ASIC, ASICON 2017. IEEE Computer Society, 巻 2017-October. p. 311-314 4 p.

研究成果: Conference contribution

Costs
Reusability
Digital signal processing
Energy utilization
Processing
1 引用 (Scopus)

A multiple cyclic-route generation method for strolling based on point-of-interests

Nishimura, T., Ishikawa, K., Takayama, T., Yanagisawa, M. & Togawa, N., 2018 12 13, 2018 IEEE 8th International Conference on Consumer Electronics - Berlin, ICCE-Berlin 2018. IEEE Computer Society, 巻 2018-September. 8576185

研究成果: Conference contribution

An Effective Stochastic Number Duplicator and Its Evaluations Using Composite Arithmetic Circuits

Ishikawa, R., Tawada, M., Yanagisawa, M. & Togawa, N., 2018 9 26, 2018 IEEE 24th International Symposium on On-Line Testing and Robust System Design, IOLTS 2018. Maniatakos, M., Alexandrescu, D., Gizopoulos, D. & Papavramidou, P. (版). Institute of Electrical and Electronics Engineers Inc., p. 53-56 4 p. 8474263

研究成果: Conference contribution

Networks (circuits)
Composite materials
Mean square error
Artificial intelligence
Image processing
1 引用 (Scopus)

An Ising model mapping to solve rectangle packing problem

Terada, K., Oku, D., Kanamaru, S., Tanaka, S., Hayashi, M., Yamaoka, M., Yanagisawa, M. & Togawa, N., 2018 6 5, 2018 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2018. Institute of Electrical and Electronics Engineers Inc., p. 1-4 4 p.

研究成果: Conference contribution

Ising model
Packing Problem
Rectangle
Ising Model
Annealing

A selector-based FFT processor and its FPGA implementation

Hirai, Y., Kawamura, K., Yanagisawa, M. & Togawa, N., 2018 5 29, Proceedings - International SoC Design Conference 2017, ISOCC 2017. Institute of Electrical and Electronics Engineers Inc., p. 88-89 2 p.

研究成果: Conference contribution

Fast Fourier transforms
Field programmable gate arrays (FPGA)
Signal processing
Processing

A Trojan-invalidating Circuit Based on Signal Transitions and Its FPGA Implementation

Hasegawa, K., Yanagisawa, M. & Togawa, N., 2018 4 26, 2018 IEEE International Symposium on Circuits and Systems, ISCAS 2018 - Proceedings. Institute of Electrical and Electronics Engineers Inc., 巻 2018-May. 8351058

研究成果: Conference contribution

Field programmable gate arrays (FPGA)
Networks (circuits)
Hardware
Reconfigurable hardware

Bicycle behavior recognition using sensors equipped with smartphone

Usami, Y., Ishikawa, K., Takayama, T., Yanagisawa, M. & Togawa, N., 2018 12 13, 2018 IEEE 8th International Conference on Consumer Electronics - Berlin, ICCE-Berlin 2018. IEEE Computer Society, 巻 2018-September. 8576254

研究成果: Conference contribution

Bicycles
Smartphones
Sensors
Learning systems
Accidents
3 引用 (Scopus)

Designing hardware trojans and their detection based on a SVM-based approach

Inoue, T., Hasegawa, K., Yanagisawa, M. & Togawa, N., 2018 1 8, Proceedings - 2017 IEEE 12th International Conference on ASIC, ASICON 2017. IEEE Computer Society, 巻 2017-October. p. 811-814 4 p.

研究成果: Conference contribution

Support vector machines
Hardware
Learning systems
Classifiers
Transceivers

Designing subspecies of hardware trojans and their detection using neural network approach

Inoue, T., Hasegawa, K., Kobayashi, Y., Yanagisawa, M. & Togawa, N., 2018 12 13, 2018 IEEE 8th International Conference on Consumer Electronics - Berlin, ICCE-Berlin 2018. IEEE Computer Society, 巻 2018-September. 8576247

研究成果: Conference contribution

Neural networks
Hardware
Trigger circuits
Domestic appliances
Learning systems
1 引用 (Scopus)

Detecting the Existence of Malfunctions in Microcontrollers Utilizing Power Analysis

Hasegawa, K., Yanagisawa, M. & Togawa, N., 2018 9 26, 2018 IEEE 24th International Symposium on On-Line Testing and Robust System Design, IOLTS 2018. Maniatakos, M., Alexandrescu, D., Gizopoulos, D. & Papavramidou, P. (版). Institute of Electrical and Electronics Engineers Inc., p. 97-102 6 p. 8474113

研究成果: Conference contribution

Microcontrollers
Television
Electric power utilization
Hardware
Internet of things

Floorplan-driven high-level synthesis using volatile/non-volatile registers for hybrid energy-harvesting systems

Asai, D., Yanagisawa, M. & Togawa, N., 2018 1 8, Proceedings - 2017 IEEE 12th International Conference on ASIC, ASICON 2017. IEEE Computer Society, 巻 2017-October. p. 64-67 4 p.

研究成果: Conference contribution

Energy harvesting
Networks (circuits)
High level synthesis
Energy utilization
Scheduling

Gesture recognition of air-tapping and its application to character input in VR space

Hirota, M., Yokoyama, M., Tsuboi, A. & Yanagisawa, M., 2018 12 4, SIGGRAPH Asia 2018 Posters, SA 2018. Association for Computing Machinery, Inc, 3283335

研究成果: Conference contribution

Electromyography
Gesture recognition
Muscle
Air
Controllers

Personalized landmark recommendation algorithm based on language-specific satisfaction prediction using heterogeneous open data sources

Bao, S., Yanagisawa, M. & Togawa, N., 2018 8, Proceedings - 2018 10th International Conference on Computational Intelligence and Communication Networks, CICN 2018. Akbar Hussain, D. M., Tomar, G. S. & Tomar, G. S. (版). Institute of Electrical and Electronics Engineers Inc., p. 70-76 7 p. 8864958. (Proceedings - 2018 10th International Conference on Computational Intelligence and Communication Networks, CICN 2018).

研究成果: Conference contribution

Landmarks
Recommendations
Websites
Prediction
Language

Road-illuminance level inference across road networks based on Bayesian analysis

Bao, S., Yanagisawa, M. & Togawa, N., 2018 3 26, 2018 IEEE International Conference on Consumer Electronics, ICCE 2018. Institute of Electrical and Electronics Engineers Inc., 巻 2018-January. p. 1-6 6 p.

研究成果: Conference contribution

Learning systems

Robust AES circuit design for delay variation using suspicious timing error prediction

Yahagi, Y., Yanagisawa, M. & Togawa, N., 2018 5 29, Proceedings - International SoC Design Conference 2017, ISOCC 2017. Institute of Electrical and Electronics Engineers Inc., p. 101-102 2 p.

研究成果: Conference contribution

Cryptography
Networks (circuits)
Timing circuits
1 引用 (Scopus)

Robust indoor/outdoor detection method based on sparse GPS positioning information

Iwata, S., Ishikawa, K., Takayama, T., Yanagisawa, M. & Togawa, N., 2018 12 13, 2018 IEEE 8th International Conference on Consumer Electronics - Berlin, ICCE-Berlin 2018. IEEE Computer Society, 巻 2018-September. 8576188

研究成果: Conference contribution

Global positioning system
Classifiers
Learning systems
Experiments

Soft error tolerant latch designs with low power consumption (invited paper)

Tajima, S., Togawa, N., Yanagisawa, M. & Shi, Y., 2018 1 8, Proceedings - 2017 IEEE 12th International Conference on ASIC, ASICON 2017. IEEE Computer Society, 巻 2017-October. p. 52-55 4 p.

研究成果: Conference contribution

Electric power utilization
Semiconductor materials
Radiation
Electric potential
2017

A 28-GHz band highly linear power amplifier with novel adaptive bias circuit for cascode MOSFET in 56-nm SOI CMOS

Sato, H., Yanagisawa, M. & Yoshimasu, T., 2017 12 1, EDSSC 2017 - 13th IEEE International Conference on Electron Devices and Solid-State Circuits. Institute of Electrical and Electronics Engineers Inc., 巻 2017-January. p. 1-2 2 p.

研究成果: Conference contribution

Power amplifiers
Networks (circuits)
Communication
6 引用 (Scopus)

An accurate indoor positioning algorithm using particle filter based on the proximity of bluetooth beacons

Momose, R., Nitta, T., Yanagisawa, M. & Togawa, N., 2017 12 19, 2017 IEEE 6th Global Conference on Consumer Electronics, GCCE 2017. Institute of Electrical and Electronics Engineers Inc., 巻 2017-January. p. 1-5 5 p.

研究成果: Conference contribution

beacons
Bluetooth
positioning
proximity
filters
2 引用 (Scopus)

A Proposal for Wearable Controller Device and Finger Gesture Recognition using Surface Electromyography

Tsuboi, A., Hirota, M., Sato, J., Yokoyama, M. & Yanagisawa, M., 2017 11 27, SIGGRAPH Asia 2017 Posters, SA 2017. Association for Computing Machinery, Inc, 9

研究成果: Conference contribution

Electromyography
Gesture recognition
Muscle
Controllers
Discriminant analysis
1 引用 (Scopus)

A robust scan-based side-channel attack method against HMAC-SHA-256 circuits

Oku, D., Yanagisawa, M. & Togawa, N., 2017 12 14, 2017 IEEE 7th International Conference on Consumer Electronics - Berlin, ICCE-Berlin 2017. IEEE Computer Society, 巻 2017-September. p. 79-84 6 p.

研究成果: Conference contribution

Networks (circuits)
Side channel attack
Processing
1 引用 (Scopus)

A stayed location estimation method for sparse GPS positioning information

Iwata, S., Nitta, T., Takayama, T., Yanagisawa, M. & Togawa, N., 2017 12 19, 2017 IEEE 6th Global Conference on Consumer Electronics, GCCE 2017. Institute of Electrical and Electronics Engineers Inc., 巻 2017-January. p. 1-5 5 p.

研究成果: Conference contribution

positioning
Global positioning system
Mobile devices
electric batteries
intervals

Effective write-reduction method for MLC non-volatile memory

Tawada, M., Kimura, S., Yanagisawa, M. & Togawa, N., 2017 9 25, IEEE International Symposium on Circuits and Systems: From Dreams to Innovation, ISCAS 2017 - Conference Proceedings. Institute of Electrical and Electronics Engineers Inc., 8050699

研究成果: Conference contribution

Data storage equipment
Durability
Embedded systems
1 引用 (Scopus)

Hardware Trojan detection and classification based on steady state learning

Oya, M., Yanagisawa, M. & Togawa, N., 2017 9 19, 2017 IEEE 23rd International Symposium on On-Line Testing and Robust System Design, IOLTS 2017. Institute of Electrical and Electronics Engineers Inc., p. 215-220 6 p. 8046225

研究成果: Conference contribution

Testing
Networks (circuits)
Hardware security
19 引用 (Scopus)

Hardware Trojans classification for gate-level netlists using multi-layer neural networks

Hasegawa, K., Yanagisawa, M. & Togawa, N., 2017 9 19, 2017 IEEE 23rd International Symposium on On-Line Testing and Robust System Design, IOLTS 2017. Institute of Electrical and Electronics Engineers Inc., p. 227-232 6 p. 8046227

研究成果: Conference contribution

Multilayer neural networks
Hardware
Outsourcing
Learning systems
Integrated circuit design

Implementation evaluation of scan-based attack against a Trivium cipher circuit

Oku, D., Yanagisawa, M. & Togawa, N., 2017 1 3, 2016 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2016. Institute of Electrical and Electronics Engineers Inc., p. 220-223 4 p. 7803938

研究成果: Conference contribution

Field programmable gate arrays (FPGA)
Networks (circuits)
Processing
2 引用 (Scopus)

Indoor navigation based on real-Time direction information generation using wearable glasses

Iwanaji, R., Nitta, T., Ishikawa, K., Yanagisawa, M. & Togawa, N., 2017 1 3, 2016 IEEE International Conference on Consumer Electronics-Asia, ICCE-Asia 2016. Institute of Electrical and Electronics Engineers Inc., 7804754

研究成果: Conference contribution

Navigation systems
navigation
Navigation
Glass
landmarks

Personalized one-day travel with multi-nearby-landmark recommendation

Bao, S., Yanagisawa, M. & Togawa, N., 2017 12 14, 2017 IEEE 7th International Conference on Consumer Electronics - Berlin, ICCE-Berlin 2017. IEEE Computer Society, 巻 2017-September. p. 239-242 4 p.

研究成果: Conference contribution

Planning
Industry
1 引用 (Scopus)

Rotator-based multiplexer network synthesis for field-data extractors

Ito, K., Kawamura, K., Tamiya, Y., Yanagisawa, M. & Togawa, N., 2017 4 19, Proceedings - 29th IEEE International System on Chip Conference, SOCC 2016. IEEE Computer Society, p. 194-199 6 p. 7905464

研究成果: Conference contribution

Wire
16 引用 (Scopus)

Trojan-feature extraction at gate-level netlists and its application to hardware-Trojan detection using random forest classifier

Hasegawa, K., Yanagisawa, M. & Togawa, N., 2017 9 25, IEEE International Symposium on Circuits and Systems: From Dreams to Innovation, ISCAS 2017 - Conference Proceedings. Institute of Electrical and Electronics Engineers Inc., 8050827

研究成果: Conference contribution

Feature extraction
Classifiers
Learning systems
Outsourcing
Hardware
2016
1 引用 (Scopus)

A delay variation and floorplan aware high-level synthesis algorithm with body biasing

Igawa, K., Shi, Y., Yanagisawa, M. & Togawa, N., 2016 5 25, Proceedings of the 17th International Symposium on Quality Electronic Design, ISQED 2016. IEEE Computer Society, 巻 2016-May. p. 75-80 6 p. 7479179

研究成果: Conference contribution

Bias voltage
Degradation
Networks (circuits)
High level synthesis
3 引用 (Scopus)

A high-level synthesis algorithm for FPGA designs optimizing critical path with interconnection-delay and clock-skew consideration

Fujiwara, K., Kawamura, K., Yanagisawa, M. & Togawa, N., 2016 5 31, 2016 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2016. Institute of Electrical and Electronics Engineers Inc., 7482547

研究成果: Conference contribution

clocks
Field programmable gate arrays (FPGA)
Clocks
synthesis
Networks (circuits)

A high-performance circuit design algorithm using data dependent approximation

Kawamura, K., Yanagisawa, M. & Togawa, N., 2016 12 27, ISOCC 2016 - International SoC Design Conference: Smart SoC for Intelligent Things. Institute of Electrical and Electronics Engineers Inc., p. 95-96 2 p. 7799750

研究成果: Conference contribution

Networks (circuits)
approximation
adding circuits
Adders
time measurement
3 引用 (Scopus)

A landmark-based route recommendation method for pedestrian walking strategies

Bao, S., Nitta, T., Shindou, D., Yanagisawa, M. & Togawa, N., 2016 2 3, 2015 IEEE 4th Global Conference on Consumer Electronics, GCCE 2015. Institute of Electrical and Electronics Engineers Inc., p. 672-673 2 p. 7398511

研究成果: Conference contribution

landmarks
walking
recommendations
Walking
routes
1 引用 (Scopus)

A low-power soft error tolerant latch scheme

Tajima, S., Shi, Y., Togawa, N. & Yanagisawa, M., 2016 7 19, Proceedings - 2015 IEEE 11th International Conference on ASIC, ASICON 2015. Institute of Electrical and Electronics Engineers Inc., 7516885

研究成果: Conference contribution

Electric power utilization
Integrated circuits
Capacitance
Networks (circuits)
Electric potential
2 引用 (Scopus)

A process-variation-aware multi-scenario high-level synthesis algorithm for distributed-register architectures

Igawa, K., Shi, Y., Yanagisawa, M. & Togawa, N., 2016 2 12, International System on Chip Conference. IEEE Computer Society, 巻 2016-February. p. 7-12 6 p. 7406898

研究成果: Conference contribution

Scheduling
High level synthesis
3 引用 (Scopus)

A safe and comprehensive route finding method for pedestrian based on lighting and landmark

Bao, S., Nitta, T., Ishikawa, K., Yanagisawa, M. & Togawa, N., 2016 12 27, 2016 IEEE 5th Global Conference on Consumer Electronics, GCCE 2016. Institute of Electrical and Electronics Engineers Inc., 7800525

研究成果: Conference contribution

landmarks
illuminating
Lighting
routes
fear
1 引用 (Scopus)

A visible corner-landmark based route finding algorithm for pedestrian navigation

Takeda, K., Nitta, T., Shindou, D., Yanagisawa, M. & Togawa, N., 2016 2 3, 2015 IEEE 4th Global Conference on Consumer Electronics, GCCE 2015. Institute of Electrical and Electronics Engineers Inc., p. 601-602 2 p. 7398498

研究成果: Conference contribution

landmarks
navigation
Navigation
routes
Visibility
2 引用 (Scopus)

Bit-write-reducing and error-correcting code generation by clustering error-correcting codewords for non-volatile memories

Kojo, T., Tawada, M., Yanagisawa, M. & Togawa, N., 2016 1 5, 2015 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2015. Institute of Electrical and Electronics Engineers Inc., p. 682-689 8 p. 7372636

研究成果: Conference contribution

Data storage equipment
Code generation
Crosstalk
Energy utilization
Radiation
3 引用 (Scopus)

Clock skew estimate modeling for FPGA high-level synthesis and its application

Fujiwara, K., Kawamura, K., Yanagisawa, M. & Togawa, N., 2016 7 19, Proceedings - 2015 IEEE 11th International Conference on ASIC, ASICON 2015. Institute of Electrical and Electronics Engineers Inc., 7516905

研究成果: Conference contribution

Field programmable gate arrays (FPGA)
Clocks
High level synthesis
Networks (circuits)
1 引用 (Scopus)

Comprehensive deformed map generation for wristwatch-type wearable devices based on landmark-based partitioning

Kono, K., Nitta, T., Ishikawa, K., Yanagisawa, M. & Togawa, N., 2016 12 27, 2016 IEEE 5th Global Conference on Consumer Electronics, GCCE 2016. Institute of Electrical and Electronics Engineers Inc., 7800432

研究成果: Conference contribution

landmarks
routes
wrist
Information services
partitions
22 引用 (Scopus)

Hardware Trojans classification for gate-level netlists based on machine learning

Hasegawa, K., Oya, M., Yanagisawa, M. & Togawa, N., 2016 10 20, 2016 IEEE 22nd International Symposium on On-Line Testing and Robust System Design, IOLTS 2016. Institute of Electrical and Electronics Engineers Inc., p. 203-206 4 p. 7604700

研究成果: Conference contribution

Support vector machines
Learning systems
Hardware
Classifiers
Hardware security
2 引用 (Scopus)

Image synthesis circuit design using selector-logic-based alpha blending and its FPGA implementation

Igarashi, K., Yanagisawa, M. & Togawa, N., 2016 7 19, Proceedings - 2015 IEEE 11th International Conference on ASIC, ASICON 2015. Institute of Electrical and Electronics Engineers Inc., 7517027

研究成果: Conference contribution

Field programmable gate arrays (FPGA)
Networks (circuits)
Pixels
Delay circuits
Data storage equipment