• 923 引用
  • 15 h指数
1994 …2020

年単位の研究成果

Pureに変更を加えた場合、すぐここに表示されます。

研究成果

2n RRR: Improved stochastic number duplicator based on bit re-arrangement

Ishikawa, R., Tawada, M., Yanagisawa, M. & Togawa, N., 2018 12 10, 2018 New Generation of CAS, NGCAS 2018. Institute of Electrical and Electronics Engineers Inc., p. 182-185 4 p. 8572289

研究成果: Conference contribution

1 引用 (Scopus)
1 引用 (Scopus)

A bit-write reduction method based on error-correcting codes for non-volatile memories

Tawada, M., Kimura, S., Yanagisawa, M. & Togawa, N., 2015 3 11, 20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015. Institute of Electrical and Electronics Engineers Inc., p. 496-501 6 p. 7059055

研究成果: Conference contribution

5 引用 (Scopus)
3 引用 (Scopus)

A cosynthesis algorithm for application specific processors with heterogeneous datapaths

Miyaoka, Y., Togawa, N., Yanagisawa, M. & Ohtsuki, T., 2004 6 1, p. 250-255. 6 p.

研究成果: Paper

A delay variation and floorplan aware high-level synthesis algorithm with body biasing

Igawa, K., Shi, Y., Yanagisawa, M. & Togawa, N., 2016 5 25, Proceedings of the 17th International Symposium on Quality Electronic Design, ISQED 2016. IEEE Computer Society, 巻 2016-May. p. 75-80 6 p. 7479179

研究成果: Conference contribution

1 引用 (Scopus)
5 引用 (Scopus)
1 引用 (Scopus)

A fast elliptic curve cryptosystem LSI embedding word-based montgomery multiplier

Uchida, J., Togawa, N., Yanagisawa, M. & Ohtsuki, T., 2006 1 1, : : IEICE Transactions on Electronics. E89-C, 3, p. 243-249 7 p.

研究成果: Article

1 引用 (Scopus)

A fast selector-based subtract-multiplication unit and its application to Radix-2 butterfly unit

Tsukamoto, Y., Yanagisawa, M., Ohtsuki, T. & Togawa, N., 2010 12 1, Proceedings of the 2010 Asia Pacific Conference on Circuit and System, APCCAS 2010. p. 1083-1086 4 p. 5774956. (IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS).

研究成果: Conference contribution

12 引用 (Scopus)

A floorplan-aware high-level synthesis algorithm for multiplexer reduction targeting FPGA designs

Fujiwara, K., Abe, S., Kawamura, K., Yanagisawa, M. & Togawa, N., 2015 2 5, 2014 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2014. February 版 Institute of Electrical and Electronics Engineers Inc., p. 244-247 4 p. 7032765. (IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS; 巻数 2015-February, 番号 February).

研究成果: Conference contribution

1 引用 (Scopus)

A floorplan-aware high-level synthesis technique with delay-variation tolerance

Kawamura, K., Hagio, Y., Shi, Y. & Togawa, N., 2015 9 30, Proceedings of the 2015 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2015. Institute of Electrical and Electronics Engineers Inc., p. 122-125 4 p. 7285065

研究成果: Conference contribution

2 引用 (Scopus)
2 引用 (Scopus)

A floorplan-driven high-level synthesis algorithm with multiple-operation chainings based on path enumeration

Terada, K., Yanagisawa, M. & Togawa, N., 2015 7 27, Proceedings - IEEE International Symposium on Circuits and Systems. Institute of Electrical and Electronics Engineers Inc., 巻 2015-July. p. 2129-2132 4 p. 7169100

研究成果: Conference contribution

1 引用 (Scopus)

A floorplan-driven high-level synthesis algorithm with operation chainings using chaining enumeration

Teradat, K., Yanagisawa, M. & Togawa, N., 2015 2 5, 2014 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2014. February 版 Institute of Electrical and Electronics Engineers Inc., p. 248-251 4 p. 7032766. (IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS; 巻数 2015-February, 番号 February).

研究成果: Conference contribution

1 引用 (Scopus)

A fully-connected ising model embedding method and its evaluation for CMOS annealing machines

Oku, D., Terada, K., Hayashi, M., Yamaoka, M., Tanaka, S. & Togawa, N., 2019 1 1, : : IEICE Transactions on Information and Systems. E102D, 9, p. 1696-1706 11 p.

研究成果: Article

公開
1 引用 (Scopus)
16 引用 (Scopus)
9 引用 (Scopus)
1 引用 (Scopus)
2 引用 (Scopus)

A hardware/software partitioning algorithm for SIMD processor cores

Tachikake, K., Togawa, N., Miyaoka, Y., Choi, J., Yanagisawa, M. & Ohtsuki, T., 2003 1 1, Proceedings of the ASP-DAC 2003 Asia and South Pacific Design Automation Conference. Institute of Electrical and Electronics Engineers Inc., p. 135-140 6 p. 1195006. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC; 巻数 2003-January).

研究成果: Conference contribution

2 引用 (Scopus)
11 引用 (Scopus)

A hardware-Trojan classification method utilizing boundary net structures

Hasegawa, K., Yanagisawa, M. & Togawa, N., 2018 3 26, 2018 IEEE International Conference on Consumer Electronics, ICCE 2018. Institute of Electrical and Electronics Engineers Inc., 巻 2018-January. p. 1-4 4 p.

研究成果: Conference contribution

4 引用 (Scopus)
5 引用 (Scopus)

A high-level synthesis algorithm for FPGA designs optimizing critical path with interconnection-delay and clock-skew consideration

Fujiwara, K., Kawamura, K., Yanagisawa, M. & Togawa, N., 2016 5 31, 2016 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2016. Institute of Electrical and Electronics Engineers Inc., 7482547

研究成果: Conference contribution

3 引用 (Scopus)
1 引用 (Scopus)
1 引用 (Scopus)

A high-performance circuit design algorithm using data dependent approximation

Kawamura, K., Yanagisawa, M. & Togawa, N., 2016 12 27, ISOCC 2016 - International SoC Design Conference: Smart SoC for Intelligent Things. Institute of Electrical and Electronics Engineers Inc., p. 95-96 2 p. 7799750

研究成果: Conference contribution

A hybrid NoC architecture utilizing packet transmission priority control method

Lee, S., Togawa, N., Sekihara, Y., Aoki, T. & Onozawa, A., 2012 12 1, 2012 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2012. p. 404-407 4 p. 6419057. (IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS).

研究成果: Conference contribution

4 引用 (Scopus)

A landmark-based route recommendation method for pedestrian walking strategies

Bao, S., Nitta, T., Shindou, D., Yanagisawa, M. & Togawa, N., 2016 2 3, 2015 IEEE 4th Global Conference on Consumer Electronics, GCCE 2015. Institute of Electrical and Electronics Engineers Inc., p. 672-673 2 p. 7398511

研究成果: Conference contribution

3 引用 (Scopus)
1 引用 (Scopus)

A loop structure optimization targeting high-level synthesis of fast number theoretic transform

Kawamura, K., Yanagisawa, M. & Togawa, N., 2018 5 9, 2018 19th International Symposium on Quality Electronic Design, ISQED 2018. IEEE Computer Society, 巻 2018-March. p. 106-111 6 p.

研究成果: Conference contribution

2 引用 (Scopus)

A low cost and high speed CSD-based symmetric transpose block FIR implementation

Ye, J., Shi, Y., Togawa, N. & Yanagisawa, M., 2018 1 8, Proceedings - 2017 IEEE 12th International Conference on ASIC, ASICON 2017. IEEE Computer Society, 巻 2017-October. p. 311-314 4 p.

研究成果: Conference contribution

4 引用 (Scopus)
2 引用 (Scopus)

A low-power soft error tolerant latch scheme

Tajima, S., Shi, Y., Togawa, N. & Yanagisawa, M., 2016 7 19, Proceedings - 2015 IEEE 11th International Conference on ASIC, ASICON 2015. Institute of Electrical and Electronics Engineers Inc., 7516885

研究成果: Conference contribution

1 引用 (Scopus)

Alternative run-length coding through scan chain reconfiguration for joint minimization of test data volume and power consumption in scan test

Shi, Y., Kimura, S., Togawa, N., Yanagisawa, M. & Ohtsuki, T., 2004 12 1, Proceedings of the Asian Test Symposium, ATS'04. p. 432-437 6 p. (Proceedings of the Asian Test Symposium).

研究成果: Conference contribution

2 引用 (Scopus)

A multiple cyclic-route generation method for strolling based on point-of-interests

Nishimura, T., Ishikawa, K., Takayama, T., Yanagisawa, M. & Togawa, N., 2018 12 13, 2018 IEEE 8th International Conference on Consumer Electronics - Berlin, ICCE-Berlin 2018. IEEE Computer Society, 巻 2018-September. 8576185

研究成果: Conference contribution

1 引用 (Scopus)

An accurate indoor positioning algorithm using particle filter based on the proximity of bluetooth beacons

Momose, R., Nitta, T., Yanagisawa, M. & Togawa, N., 2017 12 19, 2017 IEEE 6th Global Conference on Consumer Electronics, GCCE 2017. Institute of Electrical and Electronics Engineers Inc., 巻 2017-January. p. 1-5 5 p.

研究成果: Conference contribution

8 引用 (Scopus)