大澤 隆

研究成果

年別の研究成果 1979 2021

• 822 被引用数
• 17 h-index
• 32 Article
• 24 Conference contribution
• 9 Conference article
• 5 Paper

年別の研究成果

年別の研究成果

検索結果

• 2021

  Compact model of magnetic tunnel junctions for SPICE simulation based on switching probability

  Liu, H. & Ohsawa, T., 2021 3 1, In: IEICE Transactions on Electronics. E104C, 3, p. 121-127 7 p.

  研究成果: Article › 査読

  • Tunnel junctions
  • SPICE
  • Circuit simulation
  • Computer hardware description languages
  • Splines
• 2020

  Array design of high-density emerging memories making clamped bit-line sense amplifier compatible with dummy cell average read scheme

  Zhang, Z. & Ohsawa, T., 2020 8, In: IEICE Transactions on Electronics. 103, 8, p. 372-380 9 p.

  研究成果: Article › 査読

  • Magnetoresistance
  • Mirrors
  • Data storage equipment
  • Tunnels
  • Electric wiring

• Co-Design of Binary Processing in Memory ReRAM Array and DNN model optimization algorithm

  Guan, Y. & Ohsawa, T., 2020 11 1, In: IEICE Transactions on Electronics. 103, 11, p. 685-692 8 p.

  研究成果: Article › 査読

  • RRAM
  • Deep neural networks
  • Data storage equipment
  • Computer hardware
  • Particle accelerators
• 2018

  A new read scheme for high-density emerging memories

  Ohsawa, T., 2018 6, In: IEICE Transactions on Electronics. E101C, 6, p. 423-429 7 p.

  研究成果: Article › 査読

  • Data storage equipment
  • Dynamic random access storage
  • RRAM
  1 被引用数 (Scopus)
• 2015

  Power-gated 32 bit microprocessor with a power controller circuit activated by deep-sleep-mode instruction achieving ultra-low power operation

  Koike, H., Ohsawa, T., Miura, S., Honjo, H., Ikeda, S., Hanyu, T., Ohno, H. & Endoh, T., 2015 4 1, In: Japanese journal of applied physics. 54, 4, 04DE08.

  研究成果: Article › 査読

  • sleep
  • microprocessors
  • Sleep
  • controllers
  • education
  7 被引用数 (Scopus)
• 2014

  A two-transistor bootstrap type selective device for spin-transfer-torque magnetic tunnel junctions

  Ohsawa, T., Ikeda, S., Hanyu, T., Ohno, H. & Endoh, T., 2014 4, In: Japanese journal of applied physics. 53, 4 SPEC. ISSUE, 04ED03.

  研究成果: Article › 査読

  • Tunnel junctions
  • tunnel junctions
  • torque
  • Transistors
  • transistors
  3 被引用数 (Scopus)

• Power reduction by power gating in differential pair type spin-transfer-torque magnetic random access memories for low-power nonvolatile cache memories

  Ohsawa, T., Ikeda, S., Hanyu, T., Ohno, H. & Endoh, T., 2014 4, In: Japanese journal of applied physics. 53, 4 SPEC. ISSUE, 04ED04.

  研究成果: Article › 査読

  • Cache memory
  • random access memory
  • torque
  • Torque
  • Data storage equipment
  6 被引用数 (Scopus)

• Trend of tunnel magnetoresistance and variation in threshold voltage for keeping data load robustness of metal-oxide-semiconductor/magnetic tunnel junction hybrid latches

  Ohsawa, T., Ikeda, S., Hanyu, T., Ohno, H. & Endoh, T., 2014 5 7, In: Journal of Applied Physics. 115, 17, 17C728.

  研究成果: Article › 査読

  • latches
  • tunnel junctions
  • metal oxide semiconductors
  • threshold voltage
  • tunnels
  11 被引用数 (Scopus)

• Wide operational margin capability of 1 kbit spin-transfer-torque memory array chip with 1-PMOS and 1-bottom-pin-magnetic-tunnel-junction type cell

  Koike, H., Ohsawa, T., Miura, S., Honjo, H., Ikeda, S., Hanyu, T., Ohno, H. & Endoh, T., 2014 4, In: Japanese journal of applied physics. 53, 4 SPEC. ISSUE, 04ED13.

  研究成果: Article › 査読

  • Tunnel junctions
  • margins
  • tunnel junctions
  • torque
  • chips
  9 被引用数 (Scopus)
• 2013

  A 1 Mb nonvolatile embedded memory using 4T2MTJ cell with 32 b fine-grained power gating scheme

  Ohsawa, T., Koike, H., Miura, S., Honjo, H., Kinoshita, K., Ikeda, S., Hanyu, T., Ohno, H. & Endoh, T., 2013 4 15, In: IEEE Journal of Solid-State Circuits. 48, 6, p. 1511-1520 10 p., 6495490.

  研究成果: Article › 査読

  • Macros
  • Static random access storage
  • Data storage equipment
  • Tunnel junctions
  • Transistors
  62 被引用数 (Scopus)
• 2012

  High-density and low-power nonvolatile static random access memory using spin-transfer-torque magnetic tunnel junction

  Ohsawa, T., Iga, F., Ikeda, S., Hanyu, T., Ohno, H. & Endoh, T., 2012 2 1, In: Japanese journal of applied physics. 51, 2 PART 2, 02BD01.

  研究成果: Article › 査読

  • Tunnel junctions
  • random access memory
  • tunnel junctions
  • torque
  • Transistors
  26 被引用数 (Scopus)

• Low power nonvolatile counter unit with fine-grained power gating

  Togashi, S., Ohsawa, T. & Endoh, T., 2012 5, In: IEICE Transactions on Electronics. E95-C, 5, p. 854-859 6 p.

  研究成果: Article › 査読

  • Electric power utilization
  • Tunnel junctions

• Nonvolatile low power 16-bit/32-bit magnetic tunnel junction based binary counter and its scaling

  Togashi, S., Ohsawa, T. & Endoh, T., 2012 2 1, In: Japanese journal of applied physics. 51, 2 PART 2, 02BE07.

  研究成果: Article › 査読

  • Tunnel junctions
  • Semiconductor counters
  • tunnel junctions
  • counters
  • scaling
  4 被引用数 (Scopus)
• 2011

  Generation of accurate reference current for data sensing in high-density memories by averaging multiple Pairs of dummy cells

  Ohsawa, T., Hatsuda, K., Fujita, K., Matsuoka, F. & Higashi, T., 2011 9 1, In: IEEE Journal of Solid-State Circuits. 46, 9, p. 2148-2157 10 p., 5783952.

  研究成果: Article › 査読

  • Data storage equipment
  7 被引用数 (Scopus)
• 2010

  Reduction of bipolar disturb of floating-body cell (FBC) by silicide and thin silicon film formed at source and drain regions

  Hamamoto, T., Fukuzumi, Y., Higashi, T., Nakajima, H., Minami, Y., Shino, T., Ohsawa, T. & Nitayama, A., 2010 8 1, In: IEEE Transactions on Electron Devices. 57, 8, p. 1781-1788 8 p., 5484457.

  研究成果: Article › 査読

  • Silicides
  • Silicon
  • Logic devices
• 2009

  Autonomous refresh of floating-body cell due to current anomaly of impact ionization

  Ohsawa, T., Fukuda, R., Higashi, T., Fujita, K., Matsuoka, F., Shino, T., Furuhashi, H., Minami, Y., Nakajima, H., Hamamoto, T., Watanabe, Y., Nitayama, A. & Furuyama, T., 2009, In: IEEE Transactions on Electron Devices. 56, 10, p. 2302-2311 10 p.

  研究成果: Article › 査読

  • Impact ionization
  • Static random access storage
  • Physics
  • Recovery
  • Feedback
  2 被引用数 (Scopus)

• Overview and future challenges of floating body RAM (FBRAM) technology for 32 nm technology node and beyond

  Hamamoto, T. & Ohsawa, T., 2009 7, In: Solid-State Electronics. 53, 7, p. 676-683 8 p.

  研究成果: Article › 査読

  • Random access storage
  • floating
  • Data storage equipment
  • cells
  • Transistors
  17 被引用数 (Scopus)
• 2007

  A floating-body cell fully compatible with 90-nm CMOS technology node for a 128-Mb SOI DRAM and its scalability

  Hamamoto, T., Minami, Y., Shino, T., Kusunoki, N., Nakajima, H., Morikado, M., Yamada, T., Inoh, K., Sakamoto, A., Higashi, T., Fujita, K., Hatsuda, K., Ohsawa, T. & Nitayama, A., 2007 3 1, In: IEEE Transactions on Electron Devices. 54, 3, p. 563-571 9 p.

  研究成果: Article › 査読

  • Dynamic random access storage
  • Scalability
  • Electric wiring
  • Silicon
  • Electric fields
  23 被引用数 (Scopus)
• 2006

  Design of a 128-mb SOI DRAM using the floating body cell (FBC)

  Ohsawa, T., Fujita, K., Hatsuda, K., Higashi, T., Shino, T., Minami, Y., Nakajima, H., Morikado, M., Inoh, K., Hamamoto, T., Watanabe, S., Fujii, S. & Furuyama, T., 2006 1 1, In: IEEE Journal of Solid-State Circuits. 41, 1, p. 135-145 11 p.

  研究成果: Article › 査読

  • Dynamic random access storage
  • Static random access storage
  • Redundancy
  10 被引用数 (Scopus)
• 2005

  Operation voltage dependence of memory cell characteristics in fully depleted floating-body cell

  Shino, T., Ohsawa, T., Higashi, T., Fujita, K., Kusunoki, N., Minami, Y., Morikado, M., Nakajima, H., Inoh, K., Hamamoto, T. & Nitayama, A., 2005 10 1, In: IEEE Transactions on Electron Devices. 52, 10, p. 2220-2225 6 p.

  研究成果: Article › 査読

  • Threshold voltage
  • Data storage equipment
  • Electric potential
  • Impurities
  • Substrates
  17 被引用数 (Scopus)
• 2002

  Memory design using a one-transistor gain cell on SOI

  Ohsawa, T., Fujita, K., Higashi, T., Iwata, Y., Kajiyama, T., Asao, Y. & Sunouchi, K., 2002 11 1, In: IEEE Journal of Solid-State Circuits. 37, 11, p. 1510-1522 13 p.

  研究成果: Article › 査読

  • Transistors
  • Data storage equipment
  • Computer hardware
  • Temperature
  50 被引用数 (Scopus)
• 1996

  A 250 mV bit-line swing scheme for 1-v operating gigabit scale drams

  Inaba, T., Takashima, D., Oowaki, Y., Ozaklt, T., Watanabe, S., Ohsawa, T., Ohuchi, K. & Tango, H., 1996 1 1, In: IEICE Transactions on Electronics. E79-C, 12, p. 1699-1705 7 p.

  研究成果: Article › 査読

  • Dynamic random access storage
  • Data storage equipment
  • Threshold voltage
  • Energy dissipation
  • Transistors
• 1991

  A 12-MHz Data Cycle 4-Mb DRAM with Pipeline Operation

  Kushiyama, N., Watanabe, Y., Ohsawa, T., Muraoka, K., Furuyama, T. & Nagahama, Y., 1991 4, In: IEEE Journal of Solid-State Circuits. 26, 4, p. 479-483 5 p.

  研究成果: Article › 査読

  • Dynamic random access storage
  • Pipelines
  2 被引用数 (Scopus)
• 1989

  A New CR-Delay Circuit Technology for High-Density and High-Speed DRAM’s

  Watanabe, Y., Ohsawa, T., Sakurai, K. & Furuyama, T., 1989 8, In: IEEE Journal of Solid-State Circuits. 24, 4, p. 905-910 6 p.

  研究成果: Article › 査読

  • Delay circuits
  • Dynamic random access storage
  • Computer peripheral equipment
  • Networks (circuits)
  • Capacitance
  13 被引用数 (Scopus)

• An Experimental 2-bit/Cell Storage DRAM for Macroce11 or Memory-on-Logic Application

  Furuyama, T., Ohsawa, T., Watanabe, Y., Muraoka, K., Natori, K., Nagahama, Y., Kimura, T. & Tanaka, H., 1989 4, In: IEEE Journal of Solid-State Circuits. 24, 2, p. 388-393 6 p.

  研究成果: Article › 査読

  • Dynamic random access storage
  • Random access storage
  • Defects
  • Data storage equipment
  17 被引用数 (Scopus)
• 1987

  A 60-ns 4-Mbit CMOS DRAM with Built-In Self-Test Function

  Ohsawa, T., Furuyama, T., Watanabe, Y., Tanaka, H., Natori, K., Shinozaki, S., Tanaka, T., Yamano, S., Nagahama, Y., Kushiyama, N. & Tsuchida, K., 1987 10, In: IEEE Journal of Solid-State Circuits. 22, 5, p. 663-668 6 p.

  研究成果: Article › 査読

  • Built-in self test
  • Dynamic random access storage
  • Random access storage
  • Capacitance
  • Metals
  16 被引用数 (Scopus)

• A New On-Chip Voltage Converter for Submicrometer High-Density DRAM's

  Furuyama, T., Watanabe, Y., Ohsawa, T. & Watanabe, S., 1987 6, In: IEEE Journal of Solid-State Circuits. 22, 3, p. 437-441 5 p.

  研究成果: Article › 査読

  • Dynamic random access storage
  • Random access storage
  • Electric potential
  • Transistors
  • Voltage regulators
  24 被引用数 (Scopus)
• 1986

  An Experimental 4-Mbit CMOS DRAM

  Furuyama, T., Ohsawa, T., Watanabe, Y., Ishiuchi, H., Watanabe, T., Tanaka, T., Natori, K. & Ozawa, O., 1986 10, In: IEEE Journal of Solid-State Circuits. 21, 5, p. 605-611 7 p.

  研究成果: Article › 査読

  • Dynamic random access storage
  • Random access storage
  • Masks
  • Hot carriers
  • Capacitors
  25 被引用数 (Scopus)
• 1983

  Azimuthal Current-Neutralization of a Rotational Light Ion Beam by a Plasma

  Ohsawa, T. & Kato, T., 1983, In: journal of the physical society of japan. 52, 8, p. 2727-2735 9 p.

  研究成果: Article › 査読

  • light ions
  • light beams
  • ion beams
  • electron plasma
  • fluids

• Thermodynamic Theory of Light Ion Beam Propagation in a Plasma

  Kato, T. & Ohsawa, T., 1983 1 1, In: journal of the physical society of japan. 52, 8, p. 2720-2726 7 p.

  研究成果: Article › 査読

  • light ions
  • light beams
  • ion beams
  • electron plasma
  • beam currents
  1 被引用数 (Scopus)
• 1980

  Synchronous quenching due to nonlinear mode coupling in beam-plasma system

  Ohsawa, T., 1980, In: journal of the physical society of japan. 49, 6, p. 2340-2348 9 p.

  研究成果: Article › 査読

  • coupled modes
  • quenching
  • nonlinear equations
  • locking
  • field strength
  2 被引用数 (Scopus)
• 1979

  Theory of the Parametric Oscillation in an Electron Beam-Plasma System

  Kato, T., Okazaki, T. & Ohsawa, T., 1979, In: journal of the physical society of japan. 46, 1, p. 277-284 8 p.

  研究成果: Article › 査読

  • electron beams
  • Mathieu function
  • vlasov equations
  • oscillations
  • electron plasma
  1 被引用数 (Scopus)