0.1-μm gate-length superconducting FET

T. Nishino, M. Hatano, H. Hasegawa, F. Murai, T. Kure, A. Hiraiwa, K. Yagi, Ushio Kawabe

研究成果: Article査読

39 被引用数 (Scopus)

抄録

A superconducting field-effect transistor (FET) with a 0.1-μm-length gate electrode was fabricated and tested at liquid-helium temperature. Two superconducting electrodes (source and drain) were formed on the same Si substrate surface with an oxide-insulated gate electrode by a self-aligned fabrication process. Superconducting current flowing through the semiconductor (Si) between the two superconducting electrodes (Nb) was controlled by a gate-bias voltage.

本文言語English
ページ(範囲)61-63
ページ数3
ジャーナルElectron device letters
10
2
出版ステータスPublished - 1989 2
外部発表はい

ASJC Scopus subject areas

  • Engineering(all)

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