1 V 46 ns 16 Mb SOI-DRAM with body control technique

Ken'ichi Shimomura, Hiroki Shimano, Fumihiro Okuda, Narumi Sakashita, Yasuo Yamaguchi, Toshiyuki Oashi, Takahisa Eimori, Masahide Inuishi, Kazutami Arimoto, Shigeto Maegawa, Yasuo Inoue, Tadashi Nishimura, Shinji Komori, Kazuo Kyuma, Akihiko Yasuoka, Haruhiko Abe

研究成果: Conference article

14 引用 (Scopus)

抜粋

Silicon on insulator (SOI) technology is used to fabricate a dynamic random access memory (DRAM) capable of low voltage operation. The device uses a body-pulsed sense amplifier and a body-driven equalizer to accelerate low-voltage speed while partially-depleted and fully depleted transistors are used to enhance on-state current. The device's performance is evaluated experimentally.

元の言語English
ページ(範囲)68-69
ページ数2
ジャーナルDigest of Technical Papers - IEEE International Solid-State Circuits Conference
40
出版物ステータスPublished - 1997 2 1
イベントProceedings of the 1997 IEEE International Solid-State Circuits Conference, ISSCC - San Francisco, CA, USA
継続期間: 1997 2 61997 2 8

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

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  • これを引用

    Shimomura, K., Shimano, H., Okuda, F., Sakashita, N., Yamaguchi, Y., Oashi, T., Eimori, T., Inuishi, M., Arimoto, K., Maegawa, S., Inoue, Y., Nishimura, T., Komori, S., Kyuma, K., Yasuoka, A., & Abe, H. (1997). 1 V 46 ns 16 Mb SOI-DRAM with body control technique. Digest of Technical Papers - IEEE International Solid-State Circuits Conference, 40, 68-69.